TMS470R1VF45AA Datasheet, PDF (13/59 Pages) Texas Instruments – 16/32-BIT RISC FLASH MICROCONTROLLER

TMS470R1VF45AA
16/32-BIT RISC FLASH MICROCONTROLLER
SPNS086A – AUGUST 2003 – REVISED NOVEMBER 2004
memory selects
Memory selects allow the user to address memory arrays (i.e., Flash, RAM, and HET RAM) at user-defined
addresses. Each memory select has its own set (low and high) of memory base address registers (MFBAHRx
and MFBALRx) that, together, define the array’s starting (base) address, block size, and protection.
The base address of each memory select is configurable to any memory address boundary that is a multiple
of the decoded block size. For more information on how to control and configure these memory select registers,
see the bus structure and memory sections of the TMS470R1x System Module Reference Guide (literature
number SPNU189).
For the memory selection assignments and the memory selected, see Table 2.
Table 2. Memory Selection Assignment
MEMORY
SELECT
0 (fine)
1 (fine)
2 (fine)
3 (fine)
4 (fine)
MEMORY SELECTED
(ALL INTERNAL)
FLASH
FLASH
RAM
RAM
HET RAM
MEMORY
SIZE
512K
32K^†
1.5K
MPU
NO
NO
YES
YES
MEMORY BASE ADDRESS REGISTER
MFBAHR0 and MFBALR0
MFBAHR1 and MFBALR1
MFBAHR2 and MFBALR2
MFBAHR3 and MFBALR3
MFBAHR4 and MFBALR4
STATIC MEM
CTL REGISTER
SMCR1
† The starting addresses for both RAM memory-select signals cannot be offset from each other by a multiple of the user-defined block size in the
memory-base address register.
RAM
The VF45AA device contains 32K bytes of internal static RAM configurable by the SYS module to be addressed
within the range of 0x0000_0000 to 0xFFE0_0000. This VF45AA RAM is implemented in one 32K array selected
by two memory-select signals. This VF45AA configuration imposes an additional constraint on the memory
map for RAM; the starting addresses for both RAM memory selects cannot be offset from each other by the
multiples of the size of the physical RAM (i.e., 32K for the VF45AA device). The VF45AA RAM is addressed
through memory selects 2 and 3.
The RAM can be protected by the memory protection unit (MPU) portion of the SYS module, allowing the user
finer blocks of memory protection than is allowed by the memory selects. The MPU is ideal for protecting an
operating system while allowing access to the current task. For more detailed information on the MPU portion
of the SYS module and memory protection, see the memory section of the TMS470R1x System Module
Reference Guide (literature number SPNU189).
F05 Flash
The F05 Flash memory is a nonvolatile electrically erasable and programmable memory implemented with a
32-bit-wide data bus interface. The F05 Flash has an external state machine for program and erase functions.
See the Flash read and Flash program and erase sections below. For more detailed functional information on
the F05 Flash module, see the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).
flash protection keys
The VF45AA device provides Flash protection keys. These four 32-bit protection keys prevent program/erase/
compaction operations from occurring until after the four protection keys have been matched by the CPU loading
the correct user keys into the FMPKEY control register. The protection keys on the VF45AA are located in the
last 4 words of the first 16K sector. For more detailed information on the Flash protection keys and the FMPKEY
control register, see the Optional Quadruple Protection Keys and Programming the Protection Keys portions
of the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).
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