LP3853ET-33 Datasheet, PDF (13/25 Pages) Texas Instruments – LP3853/LP3856 3A Fast Response Ultra Low Dropout Linear Regulators

LP3853, LP3856
www.ti.com
SNVS173G – FEBRUARY 2003 – REVISED APRIL 2013
PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces.
Noisy circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At
MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the
ground plane.
In multi-layer PCB applications, care should be taken in layout so that noisy power and ground planes do not
radiate directly into adjacent layers which carry analog power and ground.
OUTPUT NOISE
Noise is specified in two ways-
Spot Noise or Output noise density is the RMS sum of all noise sources, measured at the regulator output, at
a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a
function of frequency.
Total output Noise or Broad-band noise is the RMS sum of spot noise over a specified bandwidth, usually
several decades of frequencies.
Attention should be paid to the units of measurement. Spot noise is measured in units µV/√Hz or nV/√Hz and
total output noise is measured in µV(rms).
The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a
low frequency component and a high frequency component, which depend strongly on the silicon area and
quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the
current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a
smaller package. Increasing the current drawn by the internal reference increases the total supply current
(ground pin current). Using an optimized trade-off of ground pin current and die size, LP3853/LP3856 achieves
low noise performance and low quiescent current operation.
The total output noise specification for LP3853/LP3856 is presented in the Electrical Characteristics table. The
Output noise density at different frequencies is represented by a curve under typical performance characteristics.
SHORT-CIRCUIT PROTECTION
The LP3853 and LP3856 are short circuit protected and in the event of a peak over-current condition, the short-
circuit control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts
down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the
thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency. Please refer to the section
on thermal information for power dissipation calculations.
ERROR FLAG OPERATION
The LP3853/LP3856 produces a logic low signal at the Error Flag pin when the output drops out of regulation
due to low input voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The timing
diagram in Figure 30 shows the relationship between the ERROR flag and the output voltage. In this example,
the input voltage is changed to demonstrate the functionality of the Error Flag.
The internal Error flag comparator has an open drain output stage. Hence, the ERROR pin should be pulled high
through a pull up resistor. Although the ERROR flag pin can sink current of 1mA, this current is energy drain
from the input supply. Hence, the value of the pull up resistor should be in the range of 10kΩ to 1MΩ. The
ERROR pin must be connected to ground if this function is not used. It should also be noted that when the
shutdown pin is pulled low, the ERROR pin is forced to be invalid for reasons of saving power in shutdown
mode.
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Product Folder Links: LP3853 LP3856
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