ISO7140FCC Datasheet, PDF (13/22 Pages) Texas Instruments – 4242-VPK Small-Footprint and Low-Power Triple and Quad Channels Digital Isolators

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REGULATORY INFORMATION
ISO7131CC, ISO7140CC, ISO7140FCC
ISO7141CC, ISO7141FCC
SLLSE83E – APRIL 2013 – REVISED SEPTEMBER 2013
VDE
UL
CSA
CQC
Certified according to DIN EN
60747-5-2
Recognized under 1577
Approved under CSA Component Certified according to GB 4943.1-
Component Recognition Program Acceptance Notice
2011 and GB 8898:2011
Basic Insulation
Maximum Transient Overvoltage,
4242 V_PK
Maximum Working Voltage, 566
V_PK
Single protection, 2500 V_RMS ⁽¹⁾
Reinforced Insulation per CSA
60950-1-03 and IEC 60950-1
(2nd Ed.), 150 V_RMS maximum
working voltage
Basic Insulation per CSA 60950-
1-03 and IEC 60950-1 (2nd Ed.),
380 V_RMS maximum working
voltage
Reinforced Insulation per CSA
61010-1-04 and IEC 61010-1
(2nd Edition), 150 V_RMS
maximum working voltage
Basic Insulation, Altitude ≤
5000m, Tropical Climate, 250
VRMS maximum working voltage
File number: 40016131
File number: E181974
File number: 220991 (approval
pending)
Report Number: Pending
(1) Production tested ≥ 3000 Vrms for 1 second in accordance with UL 1577.
IEC SAFETY LIMITING VALUES
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate
sufficient power to overheat the die and damage the isolation barrier, potentially leading to secondary system
failures.
PARAMETER
I_S
Safety input, output, or supply
current
T_S Maximum case temperature
DBQ-16
TEST CONDITIONS
θ_JA = 104.5°C/W, V_I = 5.5V, T_J = 150°C, T_A = 25°C
θ_JA = 104.5°C/W, V_I = 3.6V, T_J = 150°C, T_A = 25°C
θ_JA = 104.5°C/W, V_I = 2.7V, T_J = 150°C, T_A = 25°C
MIN TYP MAX UNIT
217
332 mA
443
150 °C
The safety-limiting constraint is the absolute-maximum junction temperature specified in the Absolute Maximum
Ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the
Thermal Information table is that of a device installed on a high-K test board for leaded surface-mount packages.
The power is the recommended maximum input voltage times the current. The junction temperature is then the
ambient temperature plus the power times the junction-to-air thermal resistance.
500
450
400
350
300
250
200
150
100
50
0
0
V_CC1 = V_CC2 = 2.7V
V_CC1 = V_CC2 = 3.6V
V_CC1 = V_CC2 = 5.5V
50
100
150
200
Case Temperature – ^oC
Figure 5. DBQ-16 θ_JC Thermal Derating Curve
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