HD3SS3212 Datasheet, PDF (13/26 Pages) Texas Instruments – Two-Channel Differential 2:1/1:2 USB3.1 Mux/Demux

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10.2 Typical Applications
10.2.1 Down Facing Port for USB3.1 Type C
HD3SS3212, HD3SS3212I
SLASE74E – MAY 2015 – REVISED MAY 2016
SSTXp
SSTXn
SSRXp
0.1 µF
0.1 µF
SSRXn
USB Host
Optional
Controller
10 NŸ
V_CC
0.01 µF
0.1 µF ^{10 µF}
HD3SS3212
B0+ ¹⁹
3 _A0+
4 _A0-
7
A1+
8
A1-
2 _OEn
9 _SEL
1 _NC
10 NC
B0± ¹⁸
C0+ ¹⁵
C0± ¹⁴
B1+ ¹⁷
B1± ¹⁶
C1+ ¹³
C1± ¹²
GND ⁵
GND ¹¹
20
GND
6
A2
A3
SSTXp1
GND
SSTXn1
A1
B12
B2
GND
SSTXp2
A12
B3
GND
SSTXn2
B1
B11
GND
SSRXp1
B10 _SSRXn1
A11 _SSRXp2
A10
SSRXn2
A5
CC1
B5
CC2
USB C
V_CC
CC
Controller
Copyright © 2016, Texas Instruments Incorporated
Figure 8. Down Facing Port for USB3.1 Type C Connector
10.2.1.1 Design Requirements
The HD3SS3212 can be designed into many different applications. All the applications have certain requirements
for the system to work properly. The HD3SS3212 requires 3.3-V ±10% V_CC rail. The OEn pin must be low for
device to work otherwise it disables the outputs. This pin can be driven by a processor. The expectation is that
one side of the device has AC coupling capacitors. Table 2 provides information on expected values to perform
properly.
Table 2. Design Parameters
DESIGN PARAMETER
V_CC
AXp/n, BXp/n, CXp/n CM input voltage
Control/OEn pin max voltage for low
Control/OEn pin min voltage for high
AC coupling capacitor
R_BIAS (Figure 8) when needed
VALUE
3.3 V
0 to 2 V
0.8 V
2.0 V
100 nF
1 kΩ
10.2.1.2 Detailed Design Procedure
The HD3SS3212 is a high-speed passive switch device that can behave as a mux or demux. Because this is a
passive switch, signal integrity is important because the device provides no signal conditioning capability. The
device can support 2 to 3 inches of board trace and a connector on either end.
To design in the HD3SS3212, the designer needs to understand the following.
• Determine the loss profile between circuits that are to be muxed or demuxed.
• Provide clean impedance and electrical length matched board traces.
• Depending upon the application, determine the best place to put the 100-nF coupling capacitor.
• Provide a control signal for the SEL and OEn pins.
• The thermal pad must be connected to ground.
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