CDCLVP1102 Datasheet, PDF (13/22 Pages) Texas Instruments – Two LVPECL Output, High-Performance Clock Buffer

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CDCLVP1102
CDCLVP1102
SCAS884C – AUGUST 2009 – REVISED AUGUST 2011
V_CC
V_CC
130 W
130 W
LVPECL
82 W
82 W
(a) Output DC Termination
CDCLVP1102
V_BB
LVPECL
150 W
150 W
50 W
50 W
(b) Output AC Termination
Figure 15. LVPECL Output DC and AC Termination for V_CC = 3.3 V
Input Termination
The CDCLVP1102 inputs can be interfaced with LVPECL, LVDS, or LVCMOS drivers. Figure 16 illustrates how
to dc couple an LVCMOS input to the CDCLVP1102. The series resistance (R_S) should be placed close to the
LVCMOS driver; its value is calculated as the difference between the transmission line impedance and the driver
output impedance.
V_IH
V_th
V_IL
R_S
LVCMOS
CDCLVP1102
V_th =
V_IH + V_IL
2
Figure 16. DC-Coupled LVCMOS Input to CDCLVP1102
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