BQ26231_15 Datasheet, PDF (13/23 Pages) Texas Instruments – EMBEDDED PORTABLE APPLICATIONS

Not Recommended for New Designs
bq26231
APPLICATION INFORMATION
SLUS491 – JULY 2001
mode/wake-up enable register
The Mode/WOE register (address = 75 hex) contains the calibration and wake-up enable information, and the
STC and STD bits as described below.
The override DQ (OVRDQ) bit (bit 7) is used to override the requirement for HDQ to be low before initiating V_(OS)
calibration. This bit is normally set to zero. If OVRDQ is written to one, the bq26231 begins offset calibration
when |V_(SR)| < V_(WOE) where HDQ = Don’t care.
The OVRDQ location is
MODE/WOE BITS
7
6
5
4
3
2
1
0
OVERDQ
–
–
–
–
–
–
–
where OVRDQ is
0 HDQ = 0 and |V_(SR)| < V_(WOE) for V_(OS) calibration to begin
1 HDQ = Don’t care and |V_(SR)| < V_(WOE) for V_(OS) calibration to begin
NOTE:
The OVRDQ bit should only be used in conjunction with a calibration cycle. Normal operation of
the bq26231 is not ensured when this bit is set. After a valid calibration cycle, bit 7 is reset to zero.
The calibration (CAL) bit 6 is used to enable the bq26231 offset calibration test. Setting this bit to 1 enables a
V_(OS) calibration whenever HDQ is low (default), and |V_(SR)| < V_(WOE). This bit is cleared to 0 by the bq26231
whenever a valid V_(OS) calibration is completed, and the OFR register is updated with the new calculated offset.
The bit remains 1 if the offset calibration was not completed.
The CAL location is
MODE/WOE BITS
7
6
5
4
3
2
1
0
–
CAL
–
–
–
–
–
–
where CAL is
0 Valid offset calibration
1 Offset calibration pending
The slow time charge (STC) and slow time discharge (STD) flags indicate if the CTC or DTC registers have rolled
over beyond FFFF hex. STC set to 1 indicates a CTC rollover; STD set to 1 indicates a DTC rollover.
The STC and STD locations are
MODE/WOE BITS
7
6
5
4
3
2
1
0
–
–
STC
STD
–
–
–
–
where STC/STD is
0 No rollover
1 Rollover occurred in the corresponding CTC/DTC register.
The WOE bits (bits 3–1) are used in conjunction with the CAL bit for the calibration process. When the CAL bit
is set to 1, the bq26231 enables a V_(OS) calibration whenever HDQ is low (default), and |V_(SR)| < V_(WOE). On
bq26231 initialization (power-on reset) the WOE bits are set to1. Setting all of these bits to zero is not valid. Refer
to Table 5 for the various WOE values.
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