BQ2050_15 Datasheet, PDF (13/27 Pages) Texas Instruments – Lithium Ion Power Gauge™ IC

Not Recommended For New Designs
bq2050
Table 7. Temperature Register
TMP3
0
0
0
0
0
0
0
0
1
1
1
1
1
TMP2
0
0
0
0
1
1
1
1
0
0
0
0
1
TMP1
0
0
1
1
0
0
1
1
0
0
1
1
0
TMP0
0
1
0
1
0
1
0
1
0
1
0
1
0
Temperature
T < -30°C
-30°C < T < -20°C
-20°C < T < -10°C
-10°C < T < 0°C
0°C < T < 10°C
10°C < T < 20°C
20°C < T < 30°C
30°C < T < 40°C
40°C < T < 50°C
50°C < T < 60°C
60°C < T < 70°C
70°C < T < 80°C
T > 80°C
TMPGG Gas Gauge Bits
76
5
4
3
2
1
0
-
-
-
- GG3 GG2 GG1 GG0
Nominal Available Charge Registers
(NACH/NACL)
The read/write NACH high-byte register (address=03h) and
the read-only NACL low-byte register (address=17h) are
the main gas gauging register for the bq2050. The NAC
registers are incremented during charge actions and decre-
mented during discharge and self-discharge actions. The
correction factors for charge/discharge efficiency are applied
automatically to NAC. NACH and NACL are set to 0 dur-
ing a bq2050 reset.
Writing to the NAC registers affects the available charge
counts and, therefore, affects the bq2050 gas gauge opera-
tion. Do not write the NAC registers to a value greater than
LMD.
Battery Identification Register (BATID)
The read/write BATID register (address=04h) is avail-
able for use by the system to determine the type of bat-
tery pack. The BATID contents are retained as long as
VCC is greater than 2V. The contents of BATID have no
effect on the operation of the bq2050. There is no de-
fault setting for this register.
Last Measured Discharge Register (LMD)
LMD is a read/write register (address=05h) that the
bq2050 uses as a measured full reference. The bq2050
adjusts LMD based on the measured discharge capacity
of the battery from full to empty. In this way the bq2050
updates the capacity of the battery. LMD is set to PFC
during a bq2050 reset.
Secondary Status Flags Register (FLGS2)
The read-only FLGS2 register (address=06h) contains
the secondary bq2050 flags.
FLGS2 Bits
7
6
5
4
3210
-
DR2 DR1 DR0 - - -
The discharge rate flags, DR2–0, are bits 6–4.
DR2
0
0
0
DR1
0
0
1
DR0
0
1
0
Discharge Rate
DRATE < 0.5C
0.5C ≤ DRATE < 2C
DRATE ≥ 2C (OVLD = 1)
They are used to determine the current discharge re-
gime as follows:
FLGS2 Bits
7
65
4
3
2
-
--
-
-
-
1
0
- OVLD
The overload flag (OVLD) is asserted when a discharge
rate in excess of 2C is detected. OVLD remains asserted
as long as the condition persists and is cleared 0.5 sec-
onds after the rate drops below 2C. The overload condi-
tion is used to stop sampling of the battery terminal char-
acteristics for end-of-discharge determination.
Program Pin Pull-Down Register (PPD)
The read-only PPD register (address=07h) contains some
of the programming pin information for the bq2050. The
segment drivers, SEG1–6, have a corresponding PPD regis-
ter location, PPD1–6. A given location is set if a pull-down
resistor has been detected on its corresponding segment
driver. For example, if SEG1 and SEG4 have pull-down
resistors, the contents of PPD are xx001001.
Program Pin Pull-Up Register (PPU)
The read-only PPU register (address=08h) contains the rest
of the programming pin information for the bq2050. The
segment drivers, SEG1–6, have a corresponding PPU regis-
ter location, PPU1–6. A given location is set if a pull-up re-
sistor has been detected on its corresponding segment
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