VCA2619 Datasheet, PDF (12/19 Pages) Burr-Brown (TI) – Dual, Variable Gain Amplifier with Input Buffer

VCA2619
SBOS276A − AUGUST 2003 − REVISED AUGUST 2003
PGA POST-AMPLIFIER
Figure 5 shows a simplified circuit diagram of the PGA
block. As stated before, the input to the PGA is ac coupled
with an internal capacitor. Provisions are made so that an
external capacitor can be placed in parallel with the inter-
nal capacitor, thus lowering the usable low-frequency
bandwidth. The low-frequency bandwidth is set by the fol-
lowing equation:
1
(2 @ p @ 500kW @ (220pF ) C_EXTERNAL))
(1)
where C_EXTERNAL is the external capacitor value in farads.
Care should be taken to avoid using too large a value of
capacitor, as this can increase the power-on delay time.
The PGA gain is programmed with the same MGS bits that
control the VCA maximum attenuation factor. For VCA-
CNTL ^{= 3V (no attenuation), the VCA + PGA gain will be}
controlled by the programmed PGA gain (29dB to 43dB in
approximately 3dB steps). For clarity, the gain and attenu-
ation factors are detailed in Table I.
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MGS
SETTING
000
001
010
011
100
101
110
111
Table 1. MGS Settings.
ATTENUATOR GAIN
VCACNTL = 0.2V TO 3V
Not Valid
Not Valid
−41.0dB to 0dB
−43.3dB to 0dB
−46.4dB to 0dB
−48.2dB to 0dB
−50.2dB to 0dB
−52.3dB to 0dB
ATTENUATOR +
DIFFERENTIAL PGA
GAIN
Not Valid
Not Valid
−12dB to 29dB
−11.5dB to 31.8dB
−11.5dB to 34.9dB
−10.6dB to 37.6dB
−9.8dB to 40.4dB
−9.3dB to 43.3dB
The PGA architecture converts the single−ended signal
from the VCA into a differential signal. Low input noise was
also a requirement of the PGA design due to the large
amount of signal attenuation that can be asserted before
the PGA. At minimum VCA attenuation (used for small in-
put signals), the input buffer noise dominates; at maximum
VCA attenuation (large input signals), the PGA noise dom-
inates. Note that if the PGA output is single−ended, the ap-
parent gain will be 6dB lower.
VCA_OUTP
R_L
Q₁
Q₁₁
V_DD
Q₁₂
To Bias
Circuitry
Q₉
R_L
V_CM
+In
Q₃
Q₄
Q₂
R_S1
Q₁₃
R_S2
Q₁₄
Q₅
Q₆
Q₈
V_CM
Q₇
−In
Q₁₀
To Bias
Circuitry
VCA_OUTN
Figure 5. Simplified Block Diagram of PGA.
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