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TPS54360-Q1 Datasheet, PDF (12/42 Pages) Texas Instruments – 4.5-V to 60-V Input, 3.5-A, Step-Down DC-DC Converter with Eco-mode
TPS54360-Q1
SLVSBZ2 – SEPTEMBER 2013
www.ti.com
Error Amplifier
The TPS54360-Q1 voltage regulation loop is controlled by a transconductance error amplifier. The error amplifier
compares the FB-pin voltage to the lower of the internal soft-start voltage or the internal 0.8 V voltage reference.
The transconductance (gm) of the error amplifier is 350 μA/V during normal operation. During soft-start
operation, the transconductance is reduced to 78 μA/V and the error amplifier is referenced to the internal soft-
start voltage.
The frequency compensation components (capacitor, series resistor and capacitor) are connected between the
error amplifier output COMP pin and GND pin.
Adjusting the Output Voltage
The internal voltage reference produces a precise 0.8 V ±1% voltage reference over the operating temperature
and voltage range by scaling the output of a bandgap reference circuit. The output voltage is set by a resistor
divider from the output node to the FB pin. TI recommends to use 1% tolerance or better divider resistors. Select
the low-side resistor RLS for the desired divider current and use Equation 1 to calculate RHS. To improve
efficiency at light loads consider using larger value resistors. However, if the values are too high, the regulator is
more susceptible to noise and voltage errors from the FB input current can become noticeable.
RHS
= RLS
´
æ Vout - 0.8V ö
çè 0.8 V ÷ø
(1)
Enable and Adjusting Undervoltage Lockout
The TPS54360-Q1 is enabled when the VIN-pin voltage rises above 4.3 V and the EN-pin voltage exceeds the
enable threshold of 1.2 V. The TPS54360-Q1 is disabled when the VIN-pin voltage falls below 4 V or when the
EN-pin voltage is below 1.2 V. The EN pin has an internal pull-up current source, I1, of 1.2 μA that enables
operation of the TPS54360-Q1 when the EN pin floats.
If an application requires a higher undervoltage lockout (UVLO) threshold, use the circuit shown in Figure 23 to
adjust the input voltage UVLO with two external resistors. When the EN-pin voltage exceeds 1.2 V, an additional
3.4 μA of hysteresis current, Ihys, is sourced out of the EN pin. When the EN pin is pulled below 1.2 V, the 3.4
μA Ihys current is removed. This addional current facilitates adjustable input voltage UVLO hysteresis. Use
Equation 2 to calculate RUVLO1 for the desired UVLO hysteresis voltage. Use Equation 3 to calculate RUVLO2 for
the desired VIN start voltage.
In applications designed to start at relatively low input voltages (such as, from 4.5 V to 9 V) and withstand high
input voltages (such as, from 40 V to 60 V), the EN pin experiences a voltage greater than the absolute
maximum voltage of 8.4 V during the high input voltage condition. TI recommends to use a Zener diode to clamp
the pin voltage below the absolute maximum rating.
VIN
TPS54360-Q1
VIN
Optional
RUVLO1
EN
RUVLO2
i1 ihys
VEN
RUVLO1
EN
10 kW
RUVLO2
Node
5.8 V
Figure 23. Adjustable Undervoltage Lockout
(UVLO)
RUVLO1
=
VSTART - VSTOP
IHYS
Figure 24. Internal EN Clamp
(2)
12
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