TPS51200-EP Datasheet, PDF (12/32 Pages) Texas Instruments – Sink and Source DDR Termination Regulator

TPS51200-EP
SLUSA48 – JUNE 2016
Feature Description (continued)
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3.3VIN
V_VDDQ = 1.5 V
VLDOIN
REFIN
REFOUT
(VTTREF)
EN
(S3_SLP)
VO
PGOOD
t_{SS .}
V_VO = 0.75 V
t_SS = ^{COUT x VO}
I_OOCL
2 ms
Figure 17. Typical Timing Diagram for S3 and Pseudo-S5 Support
3.3VIN
EN
VLDOIN
REFIN
REFOUT
(VTTREF)
VO
t_SS determined
by the SS time
of VLDOIN
V_VO = 0.75 V
PGOOD
2 ms
Figure 18. Typical Timing Diagram of Tracking Start-up and Shutdown
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