TP3057BDWR Datasheet, PDF (12/17 Pages) Texas Instruments – MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER

TP3054B, TP3057B, TP13054B, TP13057B
MONOLITHIC SERIAL INTERFACE
COMBINED PCM CODEC AND FILTER
SCTS042A – MAY 1990 – REVISED JULY 1996
PRINCIPLES OF OPERATION
system reliability and design considerations
TP305xB, TP1305xB system reliability and design considerations are described in the following paragraphs.
latch-up
Latch-up is possible in all CMOS devices. It is caused by the firing of a parasitic SCR that is present due to the
inherent nature of CMOS. When a latch-up occurs, the device draws excessive amounts of current and will
continue to draw heavy current until power is removed. Latch-up can result in permanent damage to the device
if supply current to the device is not limited.
Even though the TP305xB and TP1305xB devices are heavily protected against latch-up, it is still possible to
cause latch-up under certain conditions in which excess current is forced into or out of one or more terminals.
Latch-up can occur when the positive supply voltage drops momentarily below ground, when the negative
supply voltage rises momentarily above ground, or possibly if a signal is applied to a terminal after power has
been applied but before the ground is connected. This can happen if the device is hot-inserted into a card with
the power applied, or if the device is mounted on a card that has an edge connector and the card is hot-inserted
into a system with the power on.
To help ensure that latch-up does not occur, it is considered good design practice to connect a reverse-biased
Schottky diode (with a forward voltage drop of less than or equal to 0.4 V – 1N5711 or equivalent) between the
power supply and GND (see Figure 3). If it is possible that a TP305xB- or TP1305xB-equipped card that has
an edge connector could be hot-inserted into a powered-up system, it is also important to ensure that the ground
edge connector traces are longer than the power and signal traces so that the card ground is always the first
to make contact.
device power-up sequence
Latch-up can also occur if a signal source is connected without the device being properly grounded. A signal
applied to one terminal could then find a ground through another signal terminal on the device. To ensure proper
operation of the device and as a safeguard against this sort of latch-up, it is recommended that the following
power-up sequence always be used:
1. Ensure that no signals are applied to the device before the power-up sequence is complete.
2. Connect GND.
3. Apply V_BB (most negative voltage).
4. Apply V_CC (most positive voltage).
5. Force a power down condition in the device.
6. Connect clocks.
7. Release the power down condition.
8. Apply FS synchronization pulses.
9. Apply the signal inputs.
When powering down the device, this procedure should be followed in the reverse order.
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