PTB48500_15 Datasheet, PDF (12/17 Pages) Texas Instruments – 48-V INPUT ISOLATED DC/DC CONVERTER

PTB48500 ^{PTB48500A and PTB48502A are Not Recommended for New Designs}
PTB48501
PTB48502
SLTS218C – SEPTEMBER 2003 – REVISED AUGUST 2006
www.ti.com
Table 2. Adjust Resistor Values (continued)
SWITCHING FREQUENCY SYNCHRONIZATION
Part No.
% Adjust
–13
–12
–11
–10
–9
–8
–7
–6
–5
–4
–3
–2
–1
0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
V_a (V)
1.044
1.056
1.068
1.080
1.092
1.104
1.116
1.128
1.140
1.152
1.164
1.176
1.188
1.200
1.212
1.224
1.236
1.248
1.260
1.272
1.284
1.296
1.308
1.320
PTB4850xA
R₁ / (R₂) ⁽¹⁾
(12.7) kΩ
(15.7) kΩ
(19.2) kΩ
(23.4) kΩ
(28.6) kΩ
(35) kΩ
(43.2) kΩ
(54.2) kΩ
(69.7) kΩ
(92.8) kΩ
(131) kΩ
(208) kΩ
(440) kΩ
PTB48502A
R₁ / (R₂)⁽¹⁾
(11.1) kΩ
(13.4) kΩ
(16.1) kΩ
(19.4) kΩ
(23.4) kΩ
(28.4) kΩ
(34.8) kΩ
(43.4) kΩ
(55.4) kΩ
(73.4) kΩ
103.0) kΩ
163.0) kΩ
343.0) kΩ
148 kΩ
65.8 kΩ
38.4 kΩ
24.6 kΩ
16.4 kΩ
10.9 kΩ
7 kΩ
4.1 kΩ
1.8 kΩ
0 kΩ
108.0 kΩ
48.0 kΩ
28.1 kΩ
18.1 kΩ
12.1 kΩ
8.1 kΩ
5.3 kΩ
3.2 kΩ
1.5 kΩ
0.2 kΩ
CONFIGURING THE PTB4850X AND
PTB4851X FOR DSL APPLICATIONS
When operated as a pair, the PTB4850x and
PTB4851x converters are specifically designed to
provide all the required supply voltages for powering
xDSL chipsets. The PTB4850x produces two logic
voltages. They include a 3.3-V source for logic and
I/O, and a low-voltage for powering a digital signal
processor core. The PTB4851x produces a balanced
pair of complementary supply voltages that is
required for the xDSL transceiver ICs. When used
together in these types of applications, the
PTB4850x and PTB4851x may be configured for
power-up sequencing, and also synchronized to a
common switch conversion frequency. Figure 20
shows the required cross-connects between the two
converters to enable these two features.
Unsynchronized, the difference in switch frequency
introduces a beat frequency into the input and output
AC ripple components from the converters. The beat
frequency can vary considerably with any slight
variation in either converter's switch frequency. This
results in a variable and undefined frequency
spectrum for the ripple waveforms, which would
normally require separate filters at the input of each
converter. When the switch frequency of the
converters are synchronized, the ripple components
are constrained to the fundamental and higher. This
simplifies the design of the output filters, and allows
a common filter to be specified for the treatment of
input ripple.
POWER-UP SEQUENCING
The desired power-up sequence for the AC7 supply
voltages requires that the two logic-level voltages
from the PTB4850x converter rise to regulation prior
to the two complementary voltages that power the
transceiver ICs. This sequence cannot be
guaranteed if the PTB4850x and PTB4851x are
allowed to power up independently, especially if the
48-V input voltage rises relatively slowly. To ensure
the desired power-up sequence, the EN Out pin of
the PTB4850x is directly connected to the activelow
Enable input of the PTB4851x (see Figure 20). This
allows the PTB4850x to momentarily hold off the
outputs from the PTB4851x until the logic-level
voltages have risen first. Figure 19 shows the
power-up waveforms of all four supply voltages from
the schematic of Figure 20.
V_CCIO (1 V/div)
V_CORE (1 V/div)
+V_TCVR (5 V/div)
−V_TCVR (5 V/div)
HORIZ SCALE: 10 ms/Div
Figure 19. Power-Up Sequencing Waveforms
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