LM2833_14 Datasheet, PDF (12/30 Pages) Texas Instruments – 1.5MHz/3MHz 3.0A Step-Down DC-DC Switching Regulator

LM2833
SNVS505D – MAY 2008 – REVISED JANUARY 2009
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Figure 29. Startup Response to V_IN with 100µs rise time
FREQUENCY FOLDBACK
The LM2833 uses frequency foldback to help limit switch current and power dissipation during start-up, short-
circuit and over load conditions by sensing if the feedback voltage is below 0.32V (typical). The LM2833 will
reduce the switching frequency from the nominal fixed value (1.5MHz or 3.0MHz) down to 400kHz (LM2833X) or
800kHz (LM2833Z) when the feedback voltage drops to 0V. See Figure 14 in the Typical Performance
Characteristics section.
LOAD STEP RESPONSE
The LM2833 has a fixed internal loop compensation, which results in a small-signal loop bandwidth highly related
to the output voltage level. In general, the loop bandwidth at low voltage is larger than at high voltage due to the
increased overall loop gain. The limited bandwidth at high output voltage may pose a challenge when loop step
response is concerned. In this case, one effective approach to improving loop step response is to add a feed-
forward capacitor (C_FF) in the range of 27nF to 100nF in parallel with the upper feedback resistor (assuming the
lower feedback resistor is 2kΩ), as shown in Figure 30. The feed-forward capacitor introduces a zero-pole pair
which helps compensate the loop. The position of the zero-pole pair is a function of the feedback resistors and
capacitor:
(1)
(2)
Note the factor in parenthesis is the ratio of the output voltage to the feedback voltage. As the output voltage
gets close to 0.6V, the pole moves towards the zero, tending to cancel it out. Consequently, adding C_FF will have
less effect on the step response at lower output voltages.
As an example, Figure 32 shows that at the output voltage of 3.3V, a 47nF of C_FF can boost the loop bandwidth
to 117kHz, from the original 23kHz as shown in Figure 31. Correspondingly, the responses to a load step
between 0.3A and 3A without and with C_FF are shown in Figure 33 and Figure 34 respectively. The higher loop
bandwidth as a result of C_FF reduces the total output excursion by more than half.
Aside from the above approach, increasing the output capacitance is generally also effective to reduce the
excursion in output voltage caused by a load step. This approach remains valid for applications where the
desired output voltages are close to the feedback voltage.
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