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LDC1612-Q1_16 Datasheet, PDF (12/62 Pages) Texas Instruments – Multi-Channel 28-Bit Inductance to Digital Converter (LDC) for Inductive Sensing
LDC1612-Q1, LDC1614-Q1
SNOSCZ8 – APRIL 2016
www.ti.com
Table 2 shows the clock configuration registers for all channels.
CHANNEL (1)
All
CLOCK
fCLK = Master
Clock Source
0
fREF0
1
fREF1
2
fREF2
3
fREF3
0
fIN0
1
fIN1
2
fIN2
3
fIN3
Table 2. Clock Configuration Registers
REGISTER
CONFIG, addr
0x1A
FIELD [ BIT(S) ]
REF_CLK_SRC [9]
CLOCK_DIVIDER
S_CH0, addr 0x14
CLOCK_DIVIDER
S_CH1, addr 0x15
CLOCK_DIVIDER
S_CH2, addr 0x16
CLOCK_DIVIDER
S_CH3, addr 0x17
CLOCK_DIVIDER
S_CH0, addr 0x14
CLOCK_DIVIDER
S_CH1, addr 0x15
CLOCK_DIVIDER
S_CH2, addr 0x16
CLOCK_DIVIDER
S_CH3, addr 0x17
CH0_FREF_DIVIDER [9:0]
CH1_FREF_DIVIDER [9:0]
CH2_FREF_DIVIDER [9:0]
CH3_FREF_DIVIDER [9:0]
CH0_FIN_DIVIDER [15:12]
CH1_FIN_DIVIDER [15:12]
CH2_FIN_DIVIDER [15:12]
CH3_FIN_DIVIDER [15:12]
VALUE
b0 = internal oscillator is used as the
master clock
b1 = external clock source is used as the
master clock
fREF0 = fCLK / CH0_FREF_DIVIDER
fREF1 = fCLK / CH1_FREF_DIVIDER
fREF2 = fCLK / CH2_FREF_DIVIDER
fREF3 = fCLK / CH3_FREF_DIVIDER
fIN0 = fSENSOR0 / CH0_FIN_DIVIDER
fIN1 = fSENSOR1 / CH1_FIN_DIVIDER
fIN2 = fSENSOR2 / CH2_FIN_DIVIDER
fIN3 = fSENSOR3 / CH3_FIN_DIVIDER
(1) Channels 2 and 3 are only available for LDC1614
8.3.2 Multi-Channel and Single Channel Operation
The multi-channel package of the LDC enables the user to save board space and support flexible system design.
For example, temperature drift can often cause a shift in component values, resulting in a shift in resonant
frequency of the sensor. Using a 2nd sensor as a reference provides the capability to cancel out a temperature
shift. When operated in multi-channel mode, the LDC sequentially samples the active channels. In single channel
mode, the LDC samples a single channel, which is selectable. Table 3 shows the registers and values that are
used to configure either multi-channel or single channel modes.
MODE
Single channel
Multi-channel
Table 3. Single and Multi-Channel Configuration Registers
REGISTER
FIELD [ BIT(S) ]
VALUE (1)
00 = chan 0
CONFIG, addr 0x1A
ACTIVE_CHAN [15:14]
01 = chan 1
10 = chan 2
11 = chan 3
MUX_CONFIG addr 0x1B
AUTOSCAN_EN [15]
0 = continuous conversion on a
single channel (default)
MUX_CONFIG addr 0x1B
AUTOSCAN_EN [15]
1 = continuous conversion on
multiple channels
00 = Ch0, Ch 1
MUX_CONFIG addr 0x1B
RR_SEQUENCE [14:13]
01 = Ch0, Ch 1, Ch 2
10 = Ch0, CH1, Ch2, Ch3
(1) Channels 2 and 3 are only available for LDC1614
The digitized sensor measurement for each channel (DATAx) represents the ratio of the sensor frequency to the
reference frequency:
DATAx/ 228 = fSENSORx/fREFx
(1)
The sensor frequency can be calculated from:
¦sensor
'$7$[ ¦REFx
228
(2)
12
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