DAC7724_14 Datasheet, PDF (12/21 Pages) Texas Instruments – 12-Bit Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER

THEORY OF OPERATION
The DAC7724 and DAC7725 are quad voltage output,
12-bit digital-to-analog converters (DACs). The architecture
is a classic R-2R ladder configuration followed by an opera-
tional amplifier that serves as a buffer, as shown in Figure 1.
Each DAC has its own R-2R ladder network and output op-
amp, but all share the reference voltage inputs. The mini-
mum voltage output (“zero-scale”) and maximum voltage
output (“full-scale”) are set by the external voltage refer-
ences (V_REFL and V_REFH, respectively). The digital input is
a 12-bit parallel word and the DAC input registers offer a
readback capability. The converters can be powered from a
single +15V supply or a dual ±15V supply. Each device
offers a reset function which immediately sets all DAC
registers and DAC output voltages to mid-scale (DAC7724,
code 800_H) or to zero-scale (DAC7725, code 000_H). See
Figures 2 and 3 for the basic operation of the DAC7724/25.
R_F
R
R
R
R
R
R
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
V_OUT
FIGURE 1. DAC7724/25 Architecture.
V_REFH
V_REFL
+10.00V
0.1µF
0V to +10V
0V to +10V
Reset DACs⁽¹⁾
Load DAC Registers
Data Bus
DAC7724
DAC7725
1 V_REFH
2 V_OUTB
3 V_OUTA
4 V_SS
5 GND
6 RESET
7 LDAC
8 DB0
9 DB1
10 DB2
11 DB3
12 DB4
13 DB5
14 DB6
V_REFL 28
V_OUTC 27
V_OUTD 26
V_CC 25
V_DD 24
CS 23
A0 22
A1 21
R/W 20
DB11 19
DB10 18
DB9 17
DB8 16
DB7 15
0V to +10V
0V to +10V
Chip Select
Address Bus
or Decoder
Read/Write
Data Bus
+15V
+
0.1µF
1µF to 10µF
+5V
+
0.1µF
1µF to 10µF
NOTE: (1) Reset LOW sets all DACs to code 800_H on the DAC7724 and to code 000_H on the DAC7725.
FIGURE 2. Basic Single-Supply Operation of the DAC7724/25.
®
DAC7724, 7725
12