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DAC7513_13 Datasheet, PDF (12/27 Pages) Texas Instruments – Low-Power, Rail-to-Rail Output, 12-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER
TYPICAL CHARACTERISTICS: VDD = +2.7V (Cont.)
At TA = +25°C and +VDD = +2.7V, unless otherwise noted.
EXITING POWER-DOWN
(800H Loaded)
CLK (2.7V/div)
CODE CHANGE GLITCH
Loaded with 2kΩ
and 200pF to GND.
Code Change:
800H to 7FFH.
VOUT (1V/div)
Time (5µs/div)
Time (0.5µs/div)
THEORY OF OPERATION
DAC SECTION
R
The architecture consists of a string DAC followed by an
output buffer amplifier. Figure 1 shows a block diagram of the
DAC architecture.
R
VDD
VFB
R
DAC Register
REF (+)
Resistor String
REF (–)
GND
Output
Amplifier
VOUT
To Output
Amplifier
FIGURE 1. DAC7513 Architecture.
The input coding to the DAC7513 is straight binary, so the
ideal output voltage is given by:
VOUT
=
VREF
•
D
4096
(1)
where D = decimal equivalent of the binary code that is
loaded to the DAC register; it can range from 0 to 4095.
R
R
FIGURE 2. Resistor String.
RESISTOR STRING
The resistor string shown in Figure 2 is simply a string of
resistors, each of value R. The code loaded into the DAC
register determines at which node on the string the voltage
is tapped off to be fed into the output amplifier by closing one
of the switches connecting the string to the amplifier. It is
ensured monotonic because it is a string of resistors.
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating rail-to-rail
voltages on its output which gives an output range of
0V to VDD, it is capable of driving a load of 2kΩ in parallel with
1000pF to GND. The source and sink capabilities of the output
amplifier can be seen in the typical characteristics. The slew
rate is 1V/µs with a half-scale settling time of 8µs with the output
unloaded.
12
DAC7513
www.ti.com
SBAS157A