RM48L952_15 Datasheet, PDF (119/178 Pages) Texas Instruments – 16- and 32-Bit RISC Flash Microcontroller

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RM48L952
SPNS177D – SEPTEMBER 2011 – REVISED JUNE 2015
6.21.9 Data Modification Module (DMM)
The Data Modification Module (DMM) provides the capability to modify data in the entire 4-GB address
space of the RM4x devices from an external peripheral, with minimal interruption of the application.
6.21.9.1 Features
The DMM has the following features:
• Acts as a bus master, thus enabling direct writes to the 4-GB address space without CPU intervention
• Writes to memory locations specified in the received packet (leverages packets defined by trace mode
of the RAM trace port (RTP) module
• Writes received data to consecutive addresses, which are specified by the DMM (leverages packets
defined by direct data mode of RTP module)
• Configurable port width (1, 2, 4, 8, 16 pins)
• Up to 100 Mbps/pin data rate
• Unused pins configurable as GPIO pins
6.21.9.2 Timing Specifications
t_l(DMM)
t_r
t_h(DMM)
t_f
t_cyc(DMM)
Figure 6-27. DMMCLK Timing
t_cyc(DMM)
t_h(DMM)
t_l(DMM)
Table 6-47. Timing Requirements for DMMCLK
Cycle time, DMMCLK period
Pulse duration, DMMCLK high
Pulse duration, DMMCLK low
MIN
t_c(HCLK) * 2
((t_cyc(DMM))/2) - ((t_r+t_f)/2)
((t_cyc(DMM))/2) - ((t_r+t_f)/2)
t_ssu(DMM) t_sh(DMM)
DMMSYNC
MAX
UNIT
ns
ns
ns
DMMCLK
DMMDATA
t_dsu(DMM)
t_dh(DMM)
Figure 6-28. DMMDATA Timing
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System Information and Electrical Specifications 119
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