LM3S9U81_15 Datasheet, PDF (1161/1281 Pages) Texas Instruments – Stellaris LM3S9U81 Microcontroller

Stellaris^® LM3S9U81 Microcontroller
Table 22-7. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
C11
USB0DM
I/O
Analog Bidirectional differential data pin (D- per USB specification) for
USB0.
C12
USB0DP
I/O
Analog Bidirectional differential data pin (D+ per USB specification) for
USB0.
D1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
D2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
VDDC
D3
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 24-6 on page 1197 .
PH3
I/O
TTL
GPIO port H bit 3.
D10
EPI0S0
USB0EPEN
I/O
TTL
EPI module 0 signal 0.
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
PH2
I/O
TTL
GPIO port H bit 2.
D11
C1o
O
TTL
Analog comparator 1 output.
EPI0S1
I/O
TTL
EPI module 0 signal 1.
PB1
I/O
TTL
GPIO port B bit 1. This pin is not 5-V tolerant.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
D12
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
USB0VBUS
I/O
Analog This signal is used during the session request protocol. This signal
allows the USB PHY to both sense the voltage level of VBUS, and
pull up VBUS momentarily during VBUS pulsing.
E1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
E2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
LDO
E3
-
Power Low drop-out regulator output voltage. This pin requires an external
capacitor between the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDDC pins at the board level in
addition to the decoupling capacitor(s).
E10
VDD
-
Power Positive supply for I/O and some logic.
PB3
I/O
TTL
GPIO port B bit 3.
E11
I2C0SDA
I/O
OD
I²C module 0 data.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
PB0
I/O
TTL
GPIO port B bit 0. This pin is not 5-V tolerant.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
U1Rx
E12
USB0ID
I
TTL
UART module 1 receive. When in IrDA mode, this signal has IrDA
modulation.
I
Analog This signal senses the state of the USB ID signal. The USB PHY
enables an integrated pull-up, and an external element (USB
connector) indicates the initial state of the USB controller (pulled
down is the A side of the cable and pulled up is the B side).
F1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
F2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
July 04, 2014
Texas Instruments-Production Data
1161