UCC2891DRG4 Datasheet, PDF (11/41 Pages) Texas Instruments – 
CURRENT-MODE ACTIVE CLAMP PWM CONTROLLER

DETAILED PIN DESCRIPTIONS (continued)
UCC2891, UCC2892
UCC2893, UCC2894
ą
SLUS542F − OCTOBER 2003 − REVISED JULY 2009
OUT (pin 13)
This high-current output drives an external N-channel MOSFET. Each controller in the UCC2891 family uses
active high drive signals for the main switch of the converter.
Due to the high speed and high-drive current capability of these outputs (AUX, OUT) the parasitic inductance
of the external circuit components connected to these pins should be carefully minimized. A potential way of
avoiding unnecessary parasitic inductances in the gate drive circuit is to place the controller in close proximity
to the MOSFETs and by ensuring that the outputs (AUX, OUT) and the gates of the MOSFET devices are
connected by wide, overlapping traces.
VDD (pin 14)
The VDD rail is the primary bias for the internal, high-current gate drivers, the internal 5-V bias regulator and
for parts of the undervoltage lockout circuit. To reduce switching noise on the bias rail, a good quality ceramic
capacitor (C_HF) must be placed very closely between the VDD pin and PGND (pin 11) to provide adequate
filtering. The recommended C_HF value is 1-µF for most applications but its value might be affected by the
properties of the external MOSFET transistors used in the power stage.
In addition to the low-impedance, high-frequency filtering, the controller’s bias rail requires a larger value energy
storage capacitor (C_BIAS) connected parallel to C_HF. The energy storage capacitor must provide the hold up time
to operate the UCC2891 family (including gate drive power requirements) during start up. In steady state
operation the controller must be powered from a bootstrap winding off the power transformer or by an auxiliary
bias supply. In case of an independent auxiliary bias supply, the energy storage is provided by the output
capacitance of the bias supply. When using the internal JFET for startup, the external load on VDD must be
limited to less than 4 mA.
LINEUV (pin 15)
This input monitors the incoming power source to provide an accurate undervoltage lockout function with user
programmable hysteresis for the power supply controlled by the UCC2891 family. The unique property of the
UCC2891 family is to use only one pin to implement these functions without sacrificing on performance. The
input voltage of the power supply is scaled to the precise 1.27-V threshold of the undervoltage lockout
comparator by an external resistor divider (R_IN1, R_IN2 in Figure 7). Once the line monitor’s input threshold is
exceeded, an internal current source gets connected to the LINEUV pin. The current generator is programmed
by the R_DEL resistor connected to pin 1 of the controller. The actual current level is given as:
I_HYST
+
V_REF
2
1
R_DEL
0.05
(7)
As this current flows through R_IN2 of the input divider, the undervoltage lockout hysteresis is a function of I_HYST
and R_IN2 allowing accurate programming of the hysteresis of the line monitoring circuit.
For more information on how to program the line monitoring function refer to the Setup Guide of this datasheet.
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