TS3DDR4000 Datasheet, PDF (11/25 Pages) Texas Instruments – 12-bits 1:2 High Speed DDR2/DDR3/DDR4 Switch/Multiplexer

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9 Detailed Description
TS3DDR4000
SCDS356A – NOVEMBER 2014 – REVISED MARCH 2015
9.1 Overview
The TS3DDR4000 is 1:2 or 2:1 high speed DDR2/DDR3/DDR4 switch that offers 12-bit wide bus switching. The
A port can be routed to the B or C port for all bits simultaneously. Designed for operation in DDR2, DDR3 and
DDR4 memory bus systems that support POD_12, SSTL_12, SSTL_135, SSTL_15, or SSTL_18 signaling, the
TS3DDR4000 uses a proprietary architecture that delivers high bandwidth (differential -3dB bandwidth of up to
6.0 GHz), and very low propagation delay and skew across all channels. The TS3DDR4000 is 1.8 V logic
compatible, and all switches are bi-directional for added design flexibility. The TS3DDR4000 also offers a low-
power mode, in which all channels become high-Z and the device operates with minimal power.
9.2 Functional Block Diagram
The following diagram (Figure 18) represents the switch function block diagram of the TS3DDR4000. Port A (A0-
A11) can be routed to either port B (B0-B11) or port C (C0-C11) by configuring the SEL1 and SEL2 pins. The EN
pin can be toggled high to put the device into the low-power mode with minimal power consumption.
A0
B0
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
A11
B11
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
SEL1
SEL2
EN
Control Logic
Figure 18. TS3DDR4000 Switch Function Block Diagram
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