TPS5432 Datasheet, PDF (11/28 Pages) Texas Instruments – 2.95V to 6V Input, 3A Output, 700kHz Synchronous Step Down Converter

TPS5432
www.ti.com
SLVSB89 – MARCH 2012
ADJUSTING THE OUTPUT VOLTAGE
The output voltage is set with a resistor divider from the output node to the VSENSE pin. It is recommended to
use divider resistors with 1% tolerance or better. Start with a 10 kΩ for the R1 resistor, Figure 17, and use the
Equation 1 to calculate R2. To improve efficiency at light loads consider using larger value resistors. If the values
are too high the regulator is more susceptible to noise and voltage errors from the VSENSE input current are
noticeable.
TPS5432
V_O
R1
VSENSE
–
R2
0.808 V +
Figure 17. Voltage Divider Circuit
R2 =
V_REF
´ R1
V_OUT - V_REF
(1)
ENABLE AND UNDERVOLTAGE LOCKOUT
The TPS5432 is disabled when the VIN pin voltage falls below 2.4V. If an application requires a higher under-
voltage lockout (UVLO), use the EN pin as shown in Figure 18 to adjust the input voltage UVLO by using two
external resistors. The EN pin has an internal pull-up current source that provides the default condition of the
TPS5432 operating when the EN pin floats. Once the EN pin voltage exceeds 1.23V, an additional 3.4µA of
hysteresis is added. When the EN pin is pulled below 1.19V, the 3.4µA is removed. This additional current
facilitates input voltage hysteresis.
TPS5432
VIN
R1
i1
1.2 mA
i _hys
3.4 mA
+
R2
EN
–
Figure 18. Adjustable Under Voltage Lock Out
R1 =
V_START
æ
ç
è
V_ENFALLING
V_ENRISING
ö
÷
ø
-
V_STOP
I_p
æç_1-
è
V_ENFALLING
V_ENRISING
ö
÷
ø
+ I_h
(2)
spacer
R2 =
R1 ´ V_ENFALLING
( ) ^V_STOP ^{- V}_{ENFALL ING} ^{+ R1 I}_p ^{+ I}_h
(3)
Copyright © 2012, Texas Instruments Incorporated
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