TPS51216 Datasheet, PDF (11/30 Pages) Texas Instruments – Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered Reference

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TPS51216
SLUSAB9 – NOVEMBER 2010
TYPICAL CHARACTERISTICS (continued)
1.55
1.54
1.53
1.52
1.51
R_MODE = 200 kΩ
I_VDDQ = 0 A
I_VDDQ = 20 A
0.770
0.765
0.760
0.755
1.50
0.750
1.49
0.745
1.48
0.740
1.47
1.46
0.735
V_VDDQ = 1.5 V
1.45
0.730
6
8 10 12 14 16 18 20 22
−10
−5
0
5
10
Input Voltage (V)
VTTREF Current (mA)
Figure 13. Line Regulation
Figure 14. VTTREF Load Regulation
0.695
0.690
0.685
0.680
0.675
0.670
0.665
0.660
0.655
V_VDDQ = 1.35 V
0.650
−10
−5
0
5
10
VTTREF Current (mA)
Figure 15. VTTREF Load Regulation
0.620
0.615
0.610
0.605
0.600
0.595
0.590
0.585
V_VDDQ = 1.2 V
0.580
−10
−5
0
5
10
VTTREF Current (mA)
Figure 16. VTTREF Load Regulation
0.790
0.780
0.770
0.760
0.750
0.740
0.730
0.720
V_VDDQ = 1.5 V
0.710
−2.0 −1.5 −1.0 −0.5 0.0 0.5 1.0 1.5 2.0
VTT Current (V)
Figure 17. VTT Load Regulation
0.715
0.705
0.695
0.685
0.675
0.665
0.655
0.645
V_VDDQ = 1.35 V
0.635
−2.0 −1.5 −1.0 −0.5 0.0 0.5 1.0 1.5 2.0
VTT Current (V)
Figure 18. VTT Load Regulation
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