TL7700_16 Datasheet, PDF (11/23 Pages) Texas Instruments – SUPPLY-VOLTAGE SUPERVISOR

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V_{CC Vhys}
V_s’
1.5 V
RESET
t_po
TL7700
SLVS220F – JULY 1999 – REVISED AUGUST 2011
T
t_po
T
A. The sense voltage, V_s', is different from the SENSE terminal input voltage, V_s. V_s normally is 500 mV for triggering.
Figure 20. V_CC-RESET Timing Chart
Output Pulse-Duration Setting
Constant-current charging starts on the timing capacitor when the sensing-line voltage reaches the TL7700
sense voltage. When the capacitor voltage exceeds the threshold level of the output drive comparator, RESET
changes from a low to a high level. The output pulse duration is the time between the point when the sense-pin
voltage exceeds the threshold level and the point when the RESET output changes from a low level to a high
level. When the TL7700 is used for system power-on reset, the output pulse duration, t_po, must be set longer
than the power rise time. The value of t_po is:
t_po = C_t × 10⁵ seconds
Where:
C_t is the timing capacitor in farads
There is a limit on the device response speed. Even if C_t = 0, t_po is not 0, but approximately 5 μs to 10 μs.
Therefore, when the TL7700 is used as a comparator with hysteresis without connecting C_t, switching speeds
(t_r/t_f, t_po/t_pd, etc.) must be considered.
Copyright © 1999–2011, Texas Instruments Incorporated
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