SN74LVC1G32_15 Datasheet, PDF (11/39 Pages) Texas Instruments – Single 2-Input Positive-OR Gate

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SN74LVC1G32
SCES219V – APRIL 1999 – REVISED AUGUST 2015
9 Application and Implementation
9.1 Application Information
The SN74LVC1G32 device is a high drive CMOS device that can be used for implementing OR logic with a high
output drive, such as an LED application. It can produce 24 mA of drive current at 3.3 V making it Ideal for
driving multiple outputs and good for high speed applications up to 100 MHz. The inputs are 5.5-V tolerant
allowing translation down to V_CC.
9.2 Typical Application
OR Logic Function
Basic LED Driver
VCC
VCC
uC or Logic
uC or Logic
LVC1G32
uC or Logic
uC or Logic
uC or Logic
LVC1G32
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it can drive currents that would exceed maximum limits. The high drive will also create fast
edges into light loads, so routing and load conditions should be considered to prevent ringing.
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions:
– Rise time and fall time specs. See (Δt/ΔV) in the Recommended Operating Conditions table.
– Specified high and low levels. See (V_IH and V_IL) in the Recommended Operating Conditions table.
– Inputs are overvoltage tolerant allowing them to go as high as (V_I max) in the Recommended Operating
Conditions table at any valid V_CC.
2. Recommend Output Conditions:
– Load currents should not exceed (I_O max) per output and should not exceed total current (continuous
current through V_CC or GND) for the part. These limits are located in the Absolute Maximum Ratings
table.
– Outputs should not be pulled above V_CC.
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