DAC1208_11 Datasheet, PDF (11/20 Pages) Texas Instruments – DAC1231/DAC1232 12-Bit, mP Compatible,Double-Buffered D to A Converters

Application Hints (Continued)
width If this does not provide a sufficient data hold time at
easily accomplished by over-compensating the DAC output
the end of the write cycle a negative edge triggered one-
amplifier by increasing the value of its feedback capacitor
shot can be included between the system write strobe and
the WR pin of the DAC This is illustrated in Figure 6 for an
exemplary system which provides a 250 ns WR strobe time
with a data hold time of only 10 ns
In applications requiring a fast output response from the
DAC and op amp filtering may not be feasible In this event
digital signals can be completely isolated from the DAC
circuitry by the use of a DM74LS374 latch until a valid
The proper data set-up time prior to the latching edge (low
CS signal is applied to update the DAC This is shown in
to high transition) of the WR strobe is insured if the WR
Figure 7
pulse width is within spec and the data is valid on the bus for
the duration of the DAC WR strobe
A single TRI-STATE data buffer such as the DM81LS95
can be used to isolate any number of DACs in a system
1 9 Digital Signal Feedthrough
Figure 8 shows this isolating circuitry and decoding hard-
A typical microprocessor is a tremendous potential source
of high frequency noise which can be coupled to sensitive
analog circuitry The fast edges of the data and address bus
signals generate frequency components of 10’s of mega-
hertz and may cause fast transients to appear at the DAC
output even when data is latched internally
In low frequency or DC applications low pass filtering can
reduce the magnitude of any fast transients This is most
ware for a multiple DAC analog output card Pull-up resis-
tors are used on the buffer outputs to limit the impedance at
the DAC digital inputs when the card is not selected A
unique feature of this card is that the DAC XFER strobes are
controlled by the data bus This allows a very flexible update
of any combination of analog outputs via a transfer word
which would contain a zero in the bit position assigned to
any of the DACs required to change to a new output value
Obsolete^TLH5690-13
FIGURE 7 Isolating Data Bus from DAC Circuitry to Eliminate Digital Noise Coupling
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