CD4011B_15 Datasheet, PDF (11/19 Pages) Texas Instruments – CMOS NAND GATES

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PACKAGE MATERIALS INFORMATION
18-Aug-2014
*All dimensions are nominal
Device
CD4011BM96
CD4011BMT
CD4011BNSR
CD4011BPWR
CD4012BM96
CD4012BNSR
CD4012BPWR
CD4023BM96
CD4023BMT
CD4023BNSR
CD4023BPWR
Package Type
SOIC
SOIC
SO
TSSOP
SOIC
SO
TSSOP
SOIC
SOIC
SO
TSSOP
Package Drawing Pins
D
14
D
14
NS
14
PW
14
D
14
NS
14
PW
14
D
14
D
14
NS
14
PW
14
SPQ
2500
250
2000
2000
2500
2000
2000
2500
250
2000
2000
Length (mm)
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
Width (mm)
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
Height (mm)
38.0
38.0
38.0
35.0
38.0
38.0
35.0
38.0
38.0
38.0
35.0
Pack Materials-Page 2