TLV320AIC36_12 Datasheet, PDF (101/168 Pages) Texas Instruments – Low Power Stereo Audio Codec With Embedded miniDSP

TLV320AIC36
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BIT
READ/
WRITE
D4
R/W
D3
R/W
D2
R/W
D1
R/W
D0
R/W
SBAS387A – MAY 2009 – REVISED JUNE 2010
RESET
VALUE
0
0
0
0
0
(continued)
DESCRIPTION
Rec Left open circuit interrupt for INT1
0: disabled
1: enabled
Rec Right open circuit interrupt for INT1
0: disabled
1: enabled
Hook Interrupt for INT1
0: disabled
1: enabled
Detect long pulse for INT1
0: disabled
1: enabled
Detect short pulse for INT1
0: disabled
1: enabled
6.2.52 Page 0 / Register 53: Interrupt Enable Control Register 8 (INT2)
BIT
READ/
WRITE
RESET
VALUE
DESCRIPTION
D7
R/W
0
Combined headphone/rec amp short circuit interrupt for INT2
0: disabled
1: enabled
D6
R/W
0
Headphone Left open circuit interrupt for INT2
0: disabled
1: enabled
D5
R/W
0
Headphone Right open circuit interrupt for INT2
0: disabled
1: enabled
D4
R/W
0
Rec Left open circuit interrupt for INT2
0: disabled
1: enabled
D3
R/W
0
Rec Right open circuit interrupt for INT2
0: disabled
1: enabled
D2
R/W
0
Hook Interrupt for INT2
0: disabled
1: enabled
D1
R/W
0
Detect long pulse for INT2
0: disabled
1: enabled
D0
R/W
0
Detect short pulse for INT2
0: disabled
1: enabled
6.2.53 Page 0 / Register 54: Interrupt Edge Select Register 1
BIT
D7–D6
D5–D4
READ/
WRITE
R
R/W
RESET
VALUE
00
01
Reserved. Write only default values
Power good on VDD_ADC_LDO
00: reserved
01: rising edge triggered
10: falling edge triggered
11: triggered on change
DESCRIPTION
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REGISTER MAP 101