TMS320C6746_14 Datasheet, PDF (100/248 Pages) Texas Instruments – Fixed- and Floating-Point DSP

TMS320C6746
SPRS591E – NOVEMBER 2009 – REVISED MARCH 2014
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Table 6-13. EDMA3 Channel Controller (EDMA3CC) Registers (continued)
EDMA3_0 Channel
Controller 0
BYTE ADDRESS
0x01C0 2200
0x01C0 2208
0x01C0 2210
0x01C0 2218
0x01C0 2220
0x01C0 2228
0x01C0 2230
0x01C0 2238
0x01C0 2240
0x01C0 2250
0x01C0 2258
0x01C0 2260
0x01C0 2268
0x01C0 2270
0x01C0 2278
0x01C0 2280
0x01C0 2284
0x01C0 2288
0x01C0 228C
0x01C0 2290
0x01C0 2294
0x01C0 4000 - 0x01C0 4FFF
EDMA3_1 Channel
Controller 0
BYTE ADDRESS
ACRONYM
REGISTER DESCRIPTION
Shadow Region 1 Channel Registers
0x01E3 2200
ER
Event Register
0x01E3 2208
ECR
Event Clear Register
0x01E3 2210
ESR
Event Set Register
0x01E3 2218
CER
Chained Event Register
0x01E3 2220
EER
Event Enable Register
0x01E3 2228
EECR
Event Enable Clear Register
0x01E3 2230
EESR
Event Enable Set Register
0x01E3 2238
SER
Secondary Event Register
0x01E3 2240
SECR
Secondary Event Clear Register
0x01E3 2250
IER
Interrupt Enable Register
0x01E3 2258
IECR
Interrupt Enable Clear Register
0x01E3 2260
IESR
Interrupt Enable Set Register
0x01E3 2268
IPR
Interrupt Pending Register
0x01E3 2270
ICR
Interrupt Clear Register
0x01E3 2278
IEVAL
Interrupt Evaluate Register
0x01E3 2280
QER
QDMA Event Register
0x01E3 2284
QEER
QDMA Event Enable Register
0x01E3 2288
QEECR QDMA Event Enable Clear Register
0x01E3 228C
QEESR QDMA Event Enable Set Register
0x01E3 2290
QSER
QDMA Secondary Event Register
0x01E3 2294
QSECR QDMA Secondary Event Clear Register
0x01E3 4000 - 0x01E3 4FFF
—
Parameter RAM (PaRAM)
Table 6-14. EDMA3 Transfer Controller (EDMA3TC) Registers
EDMA3_0
Transfer
Controller 0
BYTE ADDRESS
0x01C0 8000
0x01C0 8004
0x01C0 8100
0x01C0 8120
0x01C0 8124
0x01C0 8128
0x01C0 812C
0x01C0 8130
0x01C0 8140
0x01C0 8240
0x01C0 8244
0x01C0 8248
0x01C0 824C
0x01C0 8250
0x01C0 8254
0x01C0 8258
0x01C0 825C
0x01C0 8260
EDMA3_0
Transfer
Controller 1
BYTE ADDRESS
0x01C0 8400
0x01C0 8404
0x01C0 8500
0x01C0 8520
0x01C0 8524
0x01C0 8528
0x01C0 852C
0x01C0 8530
0x01C0 8540
0x01C0 8640
0x01C0 8644
0x01C0 8648
0x01C0 864C
0x01C0 8650
0x01C0 8654
0x01C0 8658
0x01C0 865C
0x01C0 8660
EDMA3_1
Transfer
Controller 0
BYTE ADDRESS
0x01E3 8000
0x01E3 8004
0x01E3 8100
0x01E3 8120
0x01E3 8124
0x01E3 8128
0x01E3 812C
0x01E3 8130
0x01E3 8140
0x01E3 8240
0x01E3 8244
0x01E3 8248
0x01E3 824C
0x01E3 8250
0x01E3 8254
0x01E3 8258
0x01E3 825C
0x01E3 8260
ACRONYM REGISTER DESCRIPTION
PID
TCCFG
TCSTAT
ERRSTAT
ERREN
ERRCLR
ERRDET
ERRCMD
RDRATE
SAOPT
SASRC
SACNT
SADST
SABIDX
SAMPPRXY
SACNTRLD
SASRCBREF
SADSTBREF
Peripheral Identification Register
EDMA3TC Configuration Register
EDMA3TC Channel Status Register
Error Status Register
Error Enable Register
Error Clear Register
Error Details Register
Error Interrupt Command Register
Read Command Rate Register
Source Active Options Register
Source Active Source Address Register
Source Active Count Register
Source Active Destination Address Register
Source Active B-Index Register
Source Active Memory Protection Proxy Register
Source Active Count Reload Register
Source Active Source Address B-Reference Register
Source Active Destination Address B-Reference Register
100 Peripheral Information and Electrical Specifications
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