VCA2613 Datasheet, PDF (10/20 Pages) Burr-Brown (TI) – Dual, VARIABLE GAIN AMPLIFIER with Low-Noise Preamp

The capacitance that is determined in Equation 5 should be
added to the capacitance shown in Equation 4 to determine
the overall bandwidth of the LNP. The LNP_INNA (pin 12) and
the LNP_INNB (pin 25) should be bypassed to ground by the
shortest means possible to avoid any inductance in the lead.
LNP OUTPUT BUFFER
The differential LNP output is buffered by wideband class AB
voltage followers which are designed to drive low impedance
loads. This is necessary to maintain LNP gain accuracy,
since the VCA input exhibits gain-dependent input imped-
ance. The buffers are also useful when the LNP output is
brought out to drive external filters or other signal processing
circuitry. Good distortion performance is maintained with
buffer loads as low as 135Ω. As mentioned previously, the
buffer inputs are AC coupled to the LNP outputs with a
3.6kHz high-pass characteristic, and the DC common mode
level is maintained at the correct V_CM for compatibility with
the VCA input.
VOLTAGE-CONTROLLED ATTENUATOR (VCA)—DETAIL
The VCA is designed to have a dB-linear attenuation charac-
teristic, i.e. the gain loss in dB is constant for each equal
increment of the VCA_CNTL control voltage. See
Figure 1 for a block diagram of the VCA. The attenuator is
essentially a variable voltage divider consisting of one series
input resistor, R_S, and ten identical shunt FETs, placed in
parallel and controlled by sequentially activated clipping
amplifiers. Each clipping amplifier can be thought of as a
specialized voltage comparator with a soft transfer character-
istic and well-controlled output limit voltages. The reference
voltages V1 through V10 are equally spaced over the 0V to
3.0V control voltage range. As the control voltage rises
through the input range of each clipping amplifier, the ampli-
fier output will rise from 0V (FET completely ON) to V_CM –V_T
(FET nearly OFF ), where V_CM is the common source voltage
and V_T is the threshold voltage of the FET. As each FET
approaches its OFF state and the control voltage continues
to rise, the next clipping amplifier/FET combination takes
over for the next portion of the piecewise-linear attenuation
characteristic. Thus, low control voltages have most of the
FETs turned ON, while high control voltages have most
turned OFF. Each FET acts to decrease the shunt resistance
of the voltage divider formed by R_S and the parallel FET
network.
The attenuator is comprised of two sections, with five parallel
clipping amplifier/FET combinations in each. Special refer-
ence circuitry is provided so that the (V_CM –V_T) limit voltage
will track temperature and IC process variations, minimizing
the effects on the attenuator control characteristic.
In addition to the analog VCA_CNTL gain setting input, the
attenuator architecture provides digitally programmable ad-
justment in eight steps, via the three Maximum Gain Setting
(MGS) bits. These adjust the maximum achievable gain
(corresponding to minimum attenuation in the VCA, with
VCA_CNTL = 3.0V) in 3dB increments. This function is accom-
plished by providing multiple FET sub-elements for each of
the Q₁ to Q₁₀ FET shunt elements (see Figure 12). In the
simplified diagram of Figure 13, each shunt FET is shown as
two sub-elements, Q_NA and Q_NB. Selector switches, driven by
the MGS bits, activate either or both of the sub-element FETs
to adjust the maximum R_ON and thus achieve the stepped
attenuation options.
The VCA can be used to process either differential or single-
ended signals. Fully differential operation will reduce 2nd-
harmonic distortion by about 10dB for full-scale signals.
Input impedance of the VCA will vary with gain setting, due
to the changing resistances of the programmable voltage
divider structure. At large attenuation factors (i.e., low gain
settings), the impedance will approach the series resistor
value of approximately 135Ω.
As with the LNP stage, the VCA output is AC coupled into the
PGA. This means that the attenuation-dependent DC com-
mon-mode voltage will not propagate into the PGA, and so
the PGA’s DC output level will remain constant.
Finally, note that the VCA_CNTL input consists of FET gate
inputs. This provides very high impedance and ensures that
multiple VCA2613 devices may be connected in parallel with
no significant loading effects. The nominal voltage range for
the VCA_CNTL input spans from 0V to 3V. Over driving this
input (≤ 5V) does not affect the performance.
OVERLOAD RECOVERY CIRCUITRY—DETAIL
With a maximum overall gain of 70dB, the VCA2613 is prone
to signal overloading. Such a condition may occur in either
the LNP or the PGA depending on the various gain and
attenuation settings available. The LNP is designed to pro-
duce low-distortion outputs as large as 1V_PP single-ended
(2V_PP differential). Therefore the maximum input signal for
linear operation is 2V_PP divided by the LNP differential gain
setting. Clamping circuits in the LNP ensure that larger input
amplitudes will exhibit symmetrical clipping and short recov-
ery times. The VCA itself, being basically a voltage divider,
is intrinsically free of overload conditions. However, the PGA
post-amplifier is vulnerable to sudden overload, particularly
at high gain settings. Rapid overload recovery is essential in
many signal processing applications such as ultrasound
imaging. A special comparator circuit is provided at the PGA
input which detects overrange signals (detection level de-
pendent on PGA gain setting). When the signal exceeds the
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VCA2613
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