TPS92075_14 Datasheet, PDF (10/29 Pages) Texas Instruments – Non-Isolated, Phase Dimmable, Buck PFC LED Driver with Digital Reference Control

TPS92075
SLUSB88B – DECEMBER 2012 – REVISED JANUARY 2014
Controller
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Basic Operation and Modes
The controller continuously monitors the line cycle period and the present conduction angle length to determine
the state of operation and configure other control features. Control algorithms use a normalized line period of 256
samples from ASNS fall to ASNS fall and a normalized converter reference control of 127 levels over a range of
0V to 1V .
The four main controller states are:
• Start-up
• Non-Dimming
• Dimming
• ASNS signal lost
With the exception of start-up, the controller can enter any of the states at any time as conditions demand.
The two primary modes of controlling the converter reference are:
• DC mode
• Ramp mode
During active dimming, a DC control reference increases or decreases depending on the input AC duty cycle
derived from the ASNS signal. The relationship follows the algorithm: (ASNS Length + Fixed Offset) = Output Set
point. When the conduction angle is long enough, the converter reference is changed to a triangular ramp to
achieve a high power factor. The ramp is generated gradually over several cycles ensuring the implementation is
undetectable. The controller maintains the ramp between the rising and falling ASNS signals.
The controller also sets DC reference levels during start-up and when the ASNS signal is lost. Active states in
the controller and controlled ranges are shown in Table 1.
Table 1. Control States and Controlled Reference Values
MODE
Start-up
Non-Dimming
Dimming
No ASNS
LINE DUTY CYCLE
Any
> 70%, typical average
> 70%, typical ramp range
≤ 70%
Any
CONTROLLED REFERENCE VALUE
(value / 127 ) X 1V = reference
50
55
22 to 127
35 to 63
42
Initial Start-up
Line Synchronization
When the device reaches the turn-on UVLO threshold, the output current reference resets to 0.393V (50/127)
and switching begins. The controller samples the line for approximately 80 ms (t₁ to t₂ , Figure 9) to determine
the line frequency and establish the present state of operation. After determining the line frequency, the controller
uses the information to calibrate the internal oscillator. The controller supports line frequencies from 45Hz to
65Hz. After determining frequency and duty cycle, the controller enters the appropriate control state.
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