TPS782XX_12 Datasheet, PDF (10/25 Pages) Texas Instruments – 500nA, IQ 150mA, Ultra-Low Quiescent Current

TPS782xx
SBVS115B – AUGUST 2008 – REVISED MAY 2010
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APPLICATION INFORMATION
APPLICATION EXAMPLES
The TPS782 family of LDOs is factory-programmable
to have a fixed output. Note that during startup or
steady-state conditions, it is important that the EN pin
voltage never exceed V_IN + 0.3V.
The TPS782 series are designed to be stable with
standard ceramic capacitors with values of 1.0mF or
larger at the output. X5R- and X7R-type capacitors
are best because they have minimal variation in value
and ESR over temperature. Maximum ESR should be
less than 1.0Ω. With tolerance and dc bias effects,
the minimum capacitance to ensure stability is 1mF.
4.2V to 5.5V
V_IN
IN
OUT
1mF
TPS78227
On
Off
EN
2.7V
1mF
V_OUT
GND
Figure 22. Typical Application Circuit
INPUT AND OUTPUT CAPACITOR
REQUIREMENTS
Although an input capacitor is not required for
stability, it is good analog design practice to connect
a 0.1mF to 1.0mF low equivalent series resistance
(ESR) capacitor across the input supply near the
regulator. This capacitor counteracts reactive input
sources and improves transient response, noise
rejection, and ripple rejection. A higher-value
capacitor may be necessary if large, fast rise-time
load transients are anticipated, or if the device is not
located near the power source. If source impedance
is not sufficiently low, a 0.1mF input capacitor may be
necessary to ensure stability.
BOARD LAYOUT RECOMMENDATIONS TO
IMPROVE PSRR AND NOISE PERFORMANCE
To improve ac performance (such as PSRR, output
noise, and transient response), it is recommended
that the printed circuit board (PCB) be designed with
separate ground planes for V_IN and V_OUT, with each
ground plane connected only at the GND pin of the
device. In addition, the ground connection for the
output capacitor should connect directly to the GND
pin of the device. High ESR capacitors may degrade
PSRR.
INTERNAL CURRENT LIMIT
The TPS782 is internally current-limited to protect the
regulator during fault conditions. During current limit,
the output sources a fixed amount of current that is
largely independent of output voltage. For reliable
operation, the device should not be operated in a
current limit state for extended periods of time.
The PMOS pass element in the TPS782 series has a
built-in body diode that conducts current when the
voltage at OUT exceeds the voltage at IN. This
current is not limited, so if extended reverse voltage
operation is anticipated, external limiting to 5% of
rated output current may be appropriate.
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