TLV803_17 Datasheet, PDF (10/22 Pages) Texas Instruments – 3-Pin Voltage Supervisors with Active-Low, Open-Drain Reset

TLV803, TLV853, TLV863
SBVS157C – APRIL 2011 – REVISED SEPTEMBER 2015
Application Information (continued)
2.5 V
0.1 mF
V_DD
TLV803Z
10 kW
RESET
GND
5.0 V
Microprocessor
RST
Figure 12. Output Voltage Level Shifting
9.2 Typical Application
Figure 13 shows TLV803S being used to monitor the supply rail for a DSP, FPGA, or ASIC.
3.3-V LDO
5V
IN
3.3 V
OUT
GND
V_DD
TLV803S
RESET
GND
V_DD
DSP/FPGA/ASIC
RESET
GND
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Figure 13. Typical Application
9.2.1 Design Requirements
This design calls for a 3.3-V rail to be monitored. The design resets if the supply rail falls below 2.93 V. The
output must satisfy 3.3-V CMOS logic.
9.2.2 Detailed Design Procedure
Select the TLV803S to satisfy the voltage threshold requirement.
Place a pullup resistor on RESET to VDD in order to satisfy the output logic requirement.
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