TLV62080_016 Datasheet, PDF (10/28 Pages) Texas Instruments – 1.2-A and 2-A High-Efficiency Step-Down Converter in 2-mm × 2-mm WSON Package

TLV62080, TLV62084, TLV62084A
SLVSAK9G – OCTOBER 2011 – REVISED SEPTEMBER 2016
www.ti.com
Feature Description (continued)
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V_IN,MIN = V_OUT + I_OUT,MAX ´ (R_DS(on) + R_L )
With:
• V_IN,MIN = Minimum input voltage
• I_OUT,MAX = Maximum output current
• R_DS(on) = High-side FET on-resistance
• R_L = Inductor ohmic resistance
(1)
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8.3.2 Enabling and Disabling the Device
The device is enabled by setting the EN input to a logic HIGH. Accordingly, a logic LOW disables the device. If
the device is enabled, the internal power stage starts switching and regulates the output voltage to the
programmed threshold. The EN input must be terminated and not left floating.
8.3.3 Output Discharge
The output gets discharged through the SW terminal with a typical discharge resistor of R_DIS whenever the
device shuts down (by disable, thermal shutdown or UVLO).
8.3.4 Soft Start
When EN is set to start device operation, the device starts switching after a delay of about 40 μs and VOUT rises
with a slope of about 10mV/μs (See Figure 16 and Figure 17 for typical startup operation). Soft start avoids
excessive inrush current and creates a smooth output voltage rise slope. Soft start also prevents excessive
voltage drops of primary cells and rechargeable batteries with high internal impedance.
If the output voltage is not reached within the soft start time, such as in the case of heavy load, the converter
enters standard operation. Consequently, the inductor current limit operates as described in Inductor Current-
Limit. The TLV62080 and TLV62084x devices are able to start into a pre-biased output capacitor. The converter
starts with the applied bias voltage and ramps the output voltage to the nominal value.
8.3.5 Power Good
The TLV62080 and TLV62084x devices have a power-good output going low when the output voltage is below
the nominal value. The power good maintains high impedance once the output is above 95% of the regulated
voltage, and is driven to low once the output voltage falls below typically 90% of the regulated voltage. The PG
terminal is an open drain output and is specified to sink typically up to 0.5 mA. The power good output requires a
pull-up resistor which is recommended connecting to the device output. When the device is off because of
disable, UVLO, or thermal shutdown, the PG terminal is at high impedance. TLV62084A features PG=Low in
these cases. Table 2 and Table 3 show the different PG operation for the TLV6208x and TLV62084A.
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Table 2. Power Good Pin Logic Table (TLV62080/84)
Device Information
Enable (EN=High)
Shutdown (EN=Low)
UVLO
Thermal Shutdown
Power Supply Removal
V_FB ≥ V_PG
V_FB ≤ V_PG
0.7V < V_IN < V_UVLO
T_J > T_JSD
V_IN < 0.7V
PG Logic Status
High Z
Low
√
√
√
√
√
√
10
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