SN74AUP1G02_16 Datasheet, PDF (10/34 Pages) Texas Instruments – Low-Power Single 2-Input Positive-NOR Gate

SN74AUP1G02
SCES568H – JUNE 2004 – REVISED OCTOBER 2014
8.2 Enable and Disable Times
From Output
Under Test
C_L
(see Note A)
5 kΩ
5 kΩ
2 × V_CC
S1
GND
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TEST
t_PLZ/t_PZL
t_PHZ/t_PZH
S1
2 × V_CC
GND
LOAD CIRCUIT
V_CC = 0.8 V
V_CC = 1.2 V
± 0.1 V
V_CC = 1.5 V
± 0.1 V
V_CC = 1.8 V
± 0.15 V
V_CC = 2.5 V
± 0.2 V
V_CC = 3.3 V
± 0.3 V
C_L 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
V_M
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_I
V_CC
V_CC
V_CC
V_CC
V_CC
V_CC
V_∆
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
Output
Control
V_CC/2
V_CC/2
t_PZL
Output
Waveform 1
S1 at 2 × V_CC
(see Note B)
V_CC/2
t_PLZ
V_OL + V_∆
Output
Waveform 2
S1 at GND
(see Note B)
t_PZH
V_CC/2
t_PHZ
V_OH − V_∆
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
V_CC
0V
V_CC
V_OL
V_OH
≈0 V
NOTES: A. C_L includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r/t_f = 3 ns .
D. The outputs are measured one at a time, with one transition per measurement.
E. t_PLZ and t_PHZ are the same as t_dis.
F. t_PZL and t_PZH are the same as t_en.
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
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