HDC1050_15 Datasheet, PDF (10/25 Pages) Texas Instruments – HDC1050 Low Power, High Accuracy Digital Humidity Sensor with Temperature Sensor

HDC1050
SNAS658C – MAY 2015 – REVISED DECEMBER 2015
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8.5 Programming
8.5.1 I2C Interface
The HDC1050 operates only as a slave device on the I2C bus interface. It is not allowed to have on the I2C bus
multiple devices with the same address. Connection to the bus is made via the open-drain I/O lines, SDA, and
SCL. The SDA and SCL pins feature integrated spike-suppression filters and Schmitt triggers to minimize the
effects of input spikes and bus noise. After power-up, the sensor needs at most 15 ms, to be ready to start RH
and temperature measurement. During this power-up time the HDC1050 is only able to provide the content of the
serial number registers (0xFB to 0xFF) if requested. After the power-up the sensor is in the sleep mode until a
communication or measurement is performed. All data bytes are transmitted MSB first.
8.5.1.1 Serial Bus Address
To communicate with the HDC1050, the master must first address slave devices via a slave address byte. The
slave address byte consists of seven address bits, and a direction bit that indicates the intent to execute a read
or write operation. The I2C address of the HDC1050 is 1000000 (7-bit address).
8.5.1.2 Read and Write Operations
To access a particular register on the HDC1050, write the desired register address value to the Pointer Register.
The pointer value is the first byte transferred after the slave address byte with the R/W bit low. Every write
operation to the HDC1050 requires a value for the pointer register (refer to Figure 10).
When reading from the HDC1050, the last value stored in the pointer by a write operation is used to determine
which register is accessed by a read operation. To change the pointer register for a read operation, a new value
must be written to the pointer register. This transaction is accomplished by issuing the slave address byte with
the R/W bit low, followed by the pointer byte. No additional data is required (refer to Figure 11).
The master can then generate a START condition and send the slave address byte with the R/W bit high to
initiate the read command. Note that register bytes are sent MSB first, followed by the LSB. A write operation in
a read-only register such as (DEVICE ID, MANUFACTURER ID, SERIAL ID) returns a NACK after each data
byte; read/write operation to unused address returns a NACK after the pointer; a read/write operation with
incorrect I2C address returns a NACK after the I2C address.
1
91
9
SCL
SDA
A6 A5 A4 A3 A2 A1 A0 R/W
P7 P6 P5 P4 P3 P2 P1 P0
Start by
Master
Ack by
Slave
Ack by
Slave
Frame 1
7-bit Serial Bus Address Byte
Frame 2
Pointer Register Byte
1
91
9
SCL
SDA
D15 D14 D13 D12 D11 D10 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
Frame 3
Data MSB from
MASTER
Ack by
Slave
Frame 4
Data LSB from
MASTER
Ack by
Slave
Stop by
Master
Figure 10. Writing Frame (Configuration Register)
10
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