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ADC14C105_15 Datasheet, PDF (10/33 Pages) Texas Instruments – 95/105 MSPS A/D Converter
ADC14C105
SNAS409C – MAY 2007 – REVISED MARCH 2013
www.ti.com
Dynamic Converter Electrical Characteristics at 95MSPS
Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, VA = +3.3V, VDR = +2.5V, Internal VREF
= +1.2V, fCLK = 95 MHz, 50% Duty Cycle, DCS disabled, VCM = VCMO, CL = 5 pF/pin, . Typical values are for TA = 25°C.
Boldface limits apply for TMIN ≤ TA ≤ TMAX. All other limits apply for TA = 25°C(1)(2)
Parameter
Test Conditions
Typical(3) Limits
Units
(Limits) (4)
DYNAMIC CONVERTER CHARACTERISTICS, AIN= -1dBFS
fIN = 10 MHz
SNR
Signal-to-Noise Ratio
fIN = 70 MHz
fIN = 240 MHz
fIN = 10 MHz
SFDR Spurious Free Dynamic Range
fIN = 70 MHz
fIN = 240 MHz
fIN = 10 MHz
ENOB Effective Number of Bits
fIN = 70 MHz
fIN = 240 MHz
fIN = 10 MHz
THD
Total Harmonic Disortion
fIN = 70 MHz
fIN = 240 MHz
fIN = 10 MHz
H2
Second Harmonic Distortion
fIN = 70 MHz
fIN = 240 MHz
fIN = 10 MHz
H3
Third Harmonic Distortion
fIN = 70 MHz
fIN = 240 MHz
fIN = 10 MHz
SINAD Signal-to-Noise and Distortion Ratio
fIN = 70 MHz
fIN = 240 MHz
POWER SUPPLY CHARACTERISTICS
74
dBFS
73.5
dBFS
71
dBFS
90
dBFS
86
dBFS
82
dBFS
11.9
Bits
11.8
Bits
11.4
Bits
−86
dBFS
−85
dBFS
−80
dBFS
-95
dBFS
−90
dBFS
−85
dBFS
−90
dBFS
−86
dBFS
−83
dBFS
73.5
dBFS
73
dBFS
70.5
dBFS
IA
Analog Supply Current
IDR
Digital Output Supply Current
Power Consumption
Full Operation
Full Operation(5)
Excludes IDR(5)
115
mA (max)
14.5
mA
380
mW (max)
(1) The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided
current is limited per Note 4 of the Absolute Maximum Ratings Table. However, errors in the A/D conversion can occur if the input goes
above 2.6V or below GND as described in the Operating Ratings section. See Figure 2.
(2) With a full scale differential input of 2VP-P , the 14-bit LSB is 122.1 µV.
(3) Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical
specifications are not ensured.
(4) Parameters specified in dBFS indicate the value that would be attained with a full-scale input signal.
(5) IDR is the current consumed by the switching of the output drivers and is primarily determined by load capacitance on the output pins,
the supply voltage, VDR, and the rate at which the outputs are switching (which is signal dependent). IDR=VDR(C0 x f0 + C1 x f1 +....C13 x
f13) where VDR is the output driver power supply voltage, Cn is total capacitance on the output pin, and fn is the average frequency at
which that pin is toggling.
VA
I/O
To Internal Circuitry
AGND
Figure 2.
10
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