VSP2560 Datasheet, PDF (1/32 Pages) Texas Instruments – CCD ANALOG FRONT-END FOR DIGITAL CAMERAS

VSP2560
VSP2562
VSP2566
www.ti.com ................................................................................................................................................................................................ SBES008 – AUGUST 2008
CCD ANALOG FRONT-END FOR DIGITAL CAMERAS
FEATURES
1
•2 CCD Signal Processing:
– 36-MHz Correlated Double Sampling (CDS)
• Output Resolution:
– VSP2560 (10-Bit)
– VSP2562 (12-Bit)
– VSP2566 (16-Bit)
• 16-Bit Analog-to-Digital Conversion:
– 36-MHz Conversion Rate
– No Missing Codes Ensured
• 80-dB Input-Referred SNR (at Gain = 12 dB)
• Programmable Black Level Clamping
• Programmable Gain Amp (PGA):
– –9 dB to +44 dB
– –3 dB to +18 dB (Analog Front Gain)
– –6 dB to +26 dB (Digital Gain)
• Portable Operation:
– Low Voltage: 2.7 V to 3.6 V
– Low Power: 86 mW at 3.0 V, 36 MHz
– Low Power: 6 mW (Standby Mode)
• Two-Channel, General-Purpose, 8-Bit DAC
• QFP-48 Package
DESCRIPTION
The VSP2560/62/66 are a family of complete
mixed-signal processing ICs for digital cameras that
provide correlated double sampling (CDS) and
analog-to-digital conversion for the output of CCD
arrays. The CDS extracts the pixel video information
from the CCD signal, and the analog-to-digital
converter (ADC) converts the digital signal. For
varying illumination conditions, a very stable gain
control of –9 dB to 44 dB is provided. The gain
control is linear in dB. Input signal clamping and
offset correction of the input CDS are also provided.
Offset correction is performed by the optical black
(OB) level calibration loop, and is held in calibrated
black level clamping for an accurate black level
reference. Additionally, the black level is quickly
recovered after gain changes. The VSP2560/62/66
are available in LQFP-48 packages and operate from
single +3 V supplies.
DEVICE
VSP2560
VSP2562
VSP2566
RESOLUTION
(Bits)
10
12
16
FEATURE COMPARISON BY DEVICE
TRANSFER CHARACTERISTICS
(LSB)
DNL
INL
±0.5
±1
±0.5
±2
±2
±32
OB CLAMP LOOP (LSB)
PROGRAMMABLE
RANGE
OBCLP
LEVEL
16 to 78
32
64 to 312
128
1024 to 4992
2048
OB LEVEL
2
8
128
1
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2
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
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Copyright © 2008, Texas Instruments Incorporated