TVP7000_17 Datasheet, PDF (1/39 Pages) Texas Instruments – TRIPLE 8/10-BIT, 150/110 MSPS, VIDEO AND GRAPHICS DIGITIZER WITH ANALOG PLL

TVP7000
www.ti.com
TRIPLE 8/10-BIT, 150/110 MSPS, VIDEO
AND GRAPHICS DIGITIZER WITH ANALOG PLL
SLES143 – SEPTEMBER 2005
FEATURES
• Analog Channels
– -6 dB to 6 dB Analog Gain
– Analog Input MUXs
– Auto Video Clamp
– Three Digitizing Channels, Each With
Independently Controllable Clamp, PGA,
and ADC
– Clamping: Selectable Clamping Between
Bottom Level and Mid-level
– Offset: 1024-Step Programmable RGB or
YPbPr Offset Control
– PGA: 8-Bit Programmable Gain Amplifier
– ADC: 8/10-Bit 150/110 MSPS A/D Converter
– Automatic Level Control Circuit
– Composite Sync: Integrated Sync-on-Green
Extraction From GreenLuminance Channel
– Support for DC and AC-Coupled Input
Signals
• PLL
– Fully Integrated Analog PLL for Pixel Clock
Generation
– 12-150 MHz Pixel Clock Generation From
HSYNC Input
– Adjustable PLL Loop Bandwidth for
Minimum Jitter
– 5-Bit Programmable Subpixel Accurate
Positioning of Sampling Phase
• Output Formatter
– Support for RGB/YCbCr 4:4:4 and YCbCr
4:2:2 Output Modes to Reduce Board Traces
– Dedicated DATACLK Output for Easy
Latching of Output Data
• System
– Industry-Standard Normal/Fast I²C Interface
With Register Readback Capability
– Space-Saving TQFP-100 Pin Package
– Thermally-Enhanced PowerPAD™ Package
for Better Heat Dissipation
APPLICATIONS
• LCD TV/Monitors/Projectors
• DLP TV/Projectors
• PDP TV/Monitors
• PCTV Set-Top Boxes
• Digital Image Processing
• Video Capture/Video Editing
• Scan Rate/Image Resolution Converters
• Video Conferencing
• Video/Graphics Digitizing Equipment
DESCRIPTION
TVP7000 is a complete solution for digitizing video
and graphic signals in RGB or YPbPr color spaces.
The device supports pixel rates up to 150 MHz.
Therefore, it can be used for PC graphics digitizing
up to the VESA standard of SXGA (1280 × 1024)
resolution at 75 Hz screen refresh rate, and in video
environments for the digitizing of digital TV formats,
including HDTV up to 1080p. TVP7000 can be used
to digitize CVBS and S-Video signal with 10-bit
ADCs.
The TVP7000 is powered from 3.3-V and 1.8-V
supply and integrates a triple high-performance A/D
converter with clamping functions and variable gain,
independently programmable for each channel. The
clamping timing window is provided by an external
pulse or can be generated internally. The TVP7000
includes analog slicing circuitry on the Y or G input to
support sync-on-luminance or sync-on-green extrac-
tion. In addition, TVP7000 can extract discrete
HSYNC and VSYNC from composite sync using a
sync slicer.
TVP7000 also contains a complete analog PLL block
to generate a pixel clock from the HSYNC input. Pixel
clock output frequencies range from 12 MHz to 150
MHz.
All programming of the part is done via an indus-
try-standard I²C interface, which supports both read-
ing and writing of register settings. The TVP7000 is
available in a space-saving TQFP 100-pin PowerPAD
package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated