TSB43CA43A Datasheet, PDF (1/8 Pages) Texas Instruments – iceLynx-Micro IEEE 1394a-2000 Consumer Electronics Solution

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TSB43CA43A
TSB43CB43A
TSB43CA42
SLLA211 – JUNE 2006
iceLynx-Micro IEEE 1394a-2000 Consumer Electronics Solution
FEATURES
• 1394 Features
– Integrated 400 Mbps 3-port PHY
– Compliant with IEEE 1394-1995 and IEEE
1394a-2000 standards
– Supports bus manager functions and
automatic 1394 self-ID verification.
– Separate Async Ack FIFO decreases the
ack-tracking burden on in-CPU and ex-CPU
• DTLA Encryption Support for MPEG2-DVB,
DSS, DV, and Audio (TSB43CA43A and
TSB43CA42 Only)
– Two M6 baseline ciphers (one per HSDI
port)
• Content key generation from exchange
key
– AKE acceleration features in hardware
• Random Number Generator
• Secure Hash Algorithm, Revision 1
(SHA-1)
– Other AKE acceleration features
• Elliptical curve digital signature algorithm
(EC-DCA) both signature and verification
• Elliptical curve Diffie-Hellman (EC-DH),
first phase value and shared secret
calculation
• 160-bit math functions
• High Speed Data Interface (HSDI)
– Two configurable high speed data
interfaces support the following audio and
video modes:
• MPEG2-DVB interface
• MPEG2-DSS interface
• DV codec interface
• IEC60958 interface
• Audio DAC interface
• SACD interface
• External CPU Interface
– 16-bit parallel asynchronous I/O-type
– 16-bit parallel synchronous I/O-type
– 16-bit parallel synchronous memory type
• Internal ARM7
– 50-MHz operating frequency
– 32-bit and thumb (16-bit) mode support
– UART included for communication
– 256K bytes of program memory included on
chip
– ARM JTAG included for software debug
• Data Buffers
– Large 16.5K byte total FIFO
– Programmable data/space available
indicators for buffer flow control
• Hardware Packet Formatting for the
Following Standards
– DVB MPEG2 transport stream (IEC61883-4)
– DSS MPEG2 transport stream per standard
– DV Stream (IEC 61883-2) SD-DV
– Audio over 1394 (IEC 61883-6)
– Audio Music Protocol (version 1.0 and
enhancements)
– Asynchronous and asynchronous stream
(as defined by IEEE 1394)
• Additional Features
– PID filtering for transmit function (up to 16
separate PIDs per HSDI)
– Packet insertion – two insertion buffers per
HSDI
– 11 general-purpose inputs/outputs (GPIOs)
– Interrupt driven to minimize CPU polling.
– Single 3.3-V supply
– JTAG interface to support post-assembly
scan of device I/O – boundary scan
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated