TSB43AA82GGW Datasheet, PDF (1/5 Pages) Texas Instruments – (iShynx II) 1394 Integrated PHY and Link-Layer Controller

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(iShynx II) 1394 Integrated PHY and Link-Layer Controller
for SBP-2 Products and DPP Products
TSB43AA82
TSB43AA82I
SLLA204 – JUNE 2006
FEATURES
• IEEE 1394a-2000 Compliant
• Single 3.3-V Supply
• Internal 1.8-V Circuit to Reduce Power
Consumption
• Integrated 400-Mbps Two-Port Physical Layer
(PHY)
• Internal Voltage Regulator
• IEEE 1394 Related Functions:
– Automated Read Response for ConfigROM
Register Access
– Automated Single Retry Protocol and Split
Transaction Control
• SBP-2 Related Functions:
– Supports Four Initiators by Automated
Transactions and More Can Be Supported
Through Firmware.
– Automated Management ORB Fetching
– Automated Linked Command ORB Fetching
– Automated PageTable Fetching
– Automated Status Block Transmit
• Ability to Support Direct Print Protocol (DPP)
Mode
• Data Transfers:
– Auto Address Increment of Direct/Indirect
Addressing on Data Transfer (Packetizer)
– Automated Header Insert/Strip for DMA
Data Transfers
– 8-/16-Bit Asynchronous and Synchronous
DMA I/F With Handshake and Burst Mode
– Supports ATAPI (Ultra-DMA) Mode and
SCSI Mode
– 8-/16-Bit Data/Address Multiplex
Microcontroller and 8-/16-Bit Separated
Data/Address Bus
– Three FIFO Configurations That Support
High Performance for the DMA and for
Command Exchanges
• Asynchronous Command FIFO: 1512
Bytes
• Config ROM/LOG FIFO: 504 Bytes
• DMA FIFO: 4728 Bytes
• Multiple Package Options:
– PGE Dual 1394 Port Package, 144-Terminal
Plastic Quad Flatpack
– GGW Commercial Dual 1394 Port Package,
176-Terminal BGA
– GGW Industrial Dual 1394 Port Package
(TSB43AA82I), 176-Terminal BGA With
Operational Range From –40°C to 85°C
DESCRIPTION
The TSB43AA82 is a high performance 1394 integrated PHY and link layer controller. It is compliant with the
IEEE 1394-1995 and IEEE 1394a-2000 specifications and supports asynchronous transfers.
TSB43AA82 has a generic 16-/8-bit host bus interface. It supports parallel or multiplexed connections to the
microcontroller (MCU) at rates up to 40 MHz.
The TSB43AA82 offers large data transfers with three mutually independent FIFOs: 1) the asynchronous
command FIFO with 1512 Bytes, 2) the DMA FIFO with 4728 bytes and 3) the Config ROM/LOG FIFO with 504
bytes.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated