TSB12LV22_12 Datasheet, PDF (1/45 Pages) Texas Instruments – OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER

TSB12LV22
OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
D Designed to 1394 Open Host Controller
Interface (OHCI) Specification
D IEEE 1394-1995 Compliant and Compatible
with Proposal 1394A
D Compliant to Latest PCI Specification,
PCI 2.2
D PCI Power Management Compliant
D 3.3-V Core Logic with Universal PCI
Interface Compatible with 3.3-V and 5-V PCI
Signaling Environments
D Supports Serial Bus Data Rates of 100, 200,
and 400 Mbits/s
D Provides Bus-Hold Buffers on Physical I/F
for Low-Cost Single Capacitor Isolation
SLLS290A − JULY 1998 − REVISED NOVEMBER 1998
D Supports Physical Write Posting of Up to
Three Outstanding Transactions
D Serial ROM Interface Supports 2-Wire
Devices
D Supports External Cycle Timer Control for
Customized Synchronization
D Implements PCI Burst Transfers and Deep
FIFOs to Tolerate Large Host Latency
D Provides up to Four General-Purpose I/Os
D Fabricated in Advanced Low-Power CMOS
Process
D Packaged in 100 LQFP (PZ)
description
The Texas Instruments OHCI-Lynx™ is a PCI-to-1394 host controller compatible with the latest PCI, IEEE1394,
and 1394 OHCI 1.00 specifications. The chip provides the IEEE1394 link function. It is compatible with serial
bus data rates of 100 Mbits/s, 200 Mbits/s, and 400 Mbits/s.
As required by the 1394 OHCI Specification, internal control registers are memory mapped and
non-prefetchable. The PCI configuration header, accessed through configuration cycles specified by PCI,
provides Plug-and-Play (PnP) compatibility. Furthermore, the OHCI-Lynx is compliant with the PCI Power
Management Specification, per the PC ′98 requirements.
The OHCI-Lynx design provides PCI bus master bursting. It is capable of transferring a cacheline of data at 132
Mbytes/s after connection to the memory controller. Since PCI latency can be large even on a PCI Revision 2.1
system, deep FIFOs are provided to buffer 1394 data.
Physical write posting buffers enhance serial bus performance, and multiple isochronous channels provide
simultaneous operation of real-time applications. The OHCI-Lynx also includes bus holding buffers on the phy
interface for simple and cost effective single capacitor isolation.
An advanced CMOS process is used to achieve low-power consumption while operating at PCI clock rates up
to 33 MHz.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OHCI-Lynx is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
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