English
Language : 

TPS7A87 Datasheet, PDF (1/7 Pages) Texas Instruments – LDO Voltage Regulator
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
TPS7A87
SBVS281 – MARCH 2016
TPS7A87
Dual, 500-mA, Low-Noise (3.8 μVRMS), LDO Voltage Regulator
1 Features
•1 Two Independent LDO Channels
• Low Output Noise: < 3.8 µVRMS (10 Hz–100 kHz)
• Low Dropout: 100 mVMAX at 0.5 A
• Wide Input Voltage Range: 1.4 V to 6.5 V
• Wide Output Voltage Range: 0.8 V to 5.2 V
• High Power-Supply Ripple Rejection:
– 75 dB at DC
– 40 dB at 100 kHz
– 40 dB at 1 MHz
• 1.0% Accuracy Over Line, Load, and Temperature
• Excellent Load Transient Response
• Adjustable Start-Up In-Rush Control
• Selectable Soft-Start Charging Current
• Independent Open-Drain Power-Good (PG)
Outputs
• Stable with a 10-µF or Larger Ceramic Output
Capacitor
• 4-mm × 4-mm, 20-Pin WQFN Package
2 Applications
• High-Speed Analog Circuits:
– VCO, ADC, DAC, LVDS
• Imaging: CMOS Sensors, Video ASICs
• Test and Measurement
• Instrumentation and Medical
• Professional Audio
3 Description
The TPS7A87 is a dual, low-noise (3.8 µVRMS), low-
dropout (LDO) voltage regulator capable of sourcing
500 mA per channel with only 100 mV of maximum
dropout.
The TPS7A87 provides the flexibility of two
independent LDOs and approximately 30% smaller
solution size than two single-channel LDOs. Each
output is adjustable with external resistors from 0.8 V
to 5.2 V. The wide input-voltage range of the
TPS7A87 supports operation as low as 1.4 V and up
to 6.5 V.
With 1% output voltage accuracy (over line, load, and
temperature) and soft-start capabilities to reduce in-
rush current, the TPS7A87 is ideal for powering
sensitive analog low-voltage devices [such as
voltage-controlled oscillators (VCOs), analog-to-digital
converters (ADCs), digital-to-analog converters
(DACs), CMOS sensors, and video ASICs].
The TPS7A87 is designed to power noise-sensitive
components such as those found in instrumentation,
medical, video, professional audio, test and
measurement, and high-speed communication
applications. The very low 3.8-µVRMS output noise
and wideband PSRR (40 dB at 1 MHz) minimizes
phase noise and clock jitter. These features maximize
clocking devices, ADCs, and DACs performances.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS7A87
WQFN (20)
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application Diagram
VIN1
EN1
VIN2
EN2
IN1
PG1
EN1
OUT1
TPS7A87
IN2
EN2
OUT2
PG2
ENABLE
Clock
VDD_VCO
LMK03328
LMX2581
VDD
SCLK
ADC
ENABLE
ADC3xxx
ADC3xJxx
ADC3xJBxx
ADS4xxBxx
ADS5xxx
ADS52J90
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCT PREVIEW Information. Product in design phase of
development. Subject to change or discontinuance without notice.