TPS53317_15 Datasheet, PDF (1/35 Pages) Texas Instruments – 6-A Output, D-CAP+ Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination

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TPS53317
SLUSAK4D – JUNE 2011 – REVISED JULY 2015
TPS53317 6-A Output, D-CAP+ Mode, Synchronous Step-Down,
Integrated-FET Converter for DDR Memory Termination
1 Features
•1 TI proprietary Integrated MOSFET and Packaging
Technology
• Supports DDR Memory Termination with up to 6-A
Continuous Output Source or Sink Current
• External Tracking
• Minimum External Components Count
• 1-V to 6-V Conversion Voltage
• D-CAP+™ Mode Architecture
• Supports All MLCC Output Capacitors and
SP/POSCAP
• Selectable SKIP Mode or Forced CCM
• Optimized Efficiency at Light and Heavy Loads
• Selectable 600-kHz or 1-MHz Switching
Frequency
• Selectable Overcurrent Limit (OCL)
• Overvoltage, Over-Temperature and Hiccup
Undervoltage Protection
• Adjustable Output Voltage from 0.6 V to 2 V
• 3.5 mm × 4 mm, 20-Pin VQFN Package
2 Applications
• Memory Termination Regulator for DDR, DDR2,
DDR3, DDR3L, and DDR4
• VTT Termination
• Low-Voltage Applications for 1-V to 6-V Input
Rails
3 Description
The TPS53317 device is a FET-integrated
synchronous buck regulator designed mainly for DDR
termination. It can provide a regulated output at ½
V_DDQ with both sink and source capability. The
TPS53317 device employs D-CAP+™ mode
operation that provides ease of use, low external
component count and fast transient response. The
device can also be used for other point-of-load (POL)
regulation applications requiring up to 6 A. In
addition, the device supports full, 6-A, output sinking
current capability with tight voltage regulation.
The device features two switching frequency settings
(600 kHz and 1 MHz), integrated droop support,
external tracking capability, pre-bias startup, output
soft discharge, integrated bootstrap switch, power
good function, V5IN pin UVLO protection, and
supports both ceramic and SP/POSCAP capacitors. It
supports input voltages up to 6.0 V, and output
voltages adjustable from 0.6 V to 2.0 V.
The TPS53317 device is available in the 3.5 mm × 4
mm, 20-pin, VQFN package (Green RoHs compliant
and Pb free) with TI proprietary Integrated MOSFET
and packaging technology and is specified from
–40°C to 85°C.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS53317
VQFN (20)
3.50 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Application
DDR VDDQ IN
EN
5VIN
VIN _TPS53317 BST
EN
SW
COMP
PGOOD
VREF
PGND
REFIN
V5IN
PowerPAD
VOUT
MODE
GND
PGOOD
VTT
UDG-11105
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.