TPS51116RGETG4 Datasheet, PDF (1/42 Pages) Texas Instruments – COMPLETE DDR, DDR2 AND DDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 3-A LDO, BUFFERED REFERENCE

TPS51116
www.ti.com................................................................................................................................................................ SLUS609H – MAY 2004 – REVISED JULY 2009
COMPLETE DDR, DDR2 AND DDR3 MEMORY POWER SOLUTION
SYNCHRONOUS BUCK CONTROLLER, 3-A LDO, BUFFERED REFERENCE
FEATURES
1
•2 Synchronous Buck Controller (VDDQ)
– Wide-Input Voltage Range: 3.0-V to 28-V
– D−CAP™ Mode with 100-ns Load Step
Response
– Current Mode Option Supports Ceramic
Output Capacitors
– Supports Soft-Off in S4/S5 States
– Current Sensing from R_DS(on) or Resistor
– 2.5-V (DDR), 1.8-V (DDR2), Adjustable to
1.5-V (DDR3) or Output Range 0.75-V to
3.0-V
– Equipped with Powergood, Overvoltage
Protection and Undervoltage Protection
• 3-A LDO (VTT), Buffered Reference (VREF)
– Capable to Sink and Source 3 A
– LDO Input Available to Optimize Power
Losses
– Requires only 20-µF Ceramic Output
Capacitor
– Buffered Low Noise 10-mA VREF Output
– Accuracy 20 mV for both VREF and VTT
– Supports High-Z in S3 and Soft-Off in S4/S5
– Thermal Shutdown
DESCRIPTION
The TPS51116 provides a complete power supply for
DDR/SSTL-2, DDR2/SSTL-18, and DDR3 memory
systems. It integrates a synchronous buck controller
with a 3-A sink/source tracking linear regulator and
buffered low noise reference. The TPS51116 offers
the lowest total solution cost in systems where space
is at a premium. The TPS51116 synchronous
controller runs fixed 400kHz pseudo-constant
frequency PWM with an adaptive on-time control that
can be configured in D-CAP™ Mode for ease of use
and fastest transient response or in current mode to
support ceramic output capacitors. The 3-A
sink/source LDO maintains fast transient response
only requiring 20-µF (2 × 10 µF) of ceramic output
capacitance. In addition, the LDO supply input is
available externally to significantly reduce the total
power losses. The TPS51116 supports all of the
sleep state controls placing VTT at high-Z in S3
(suspend to RAM) and discharging VDDQ, VTT and
VTTREF (soft-off) in S4/S5 (suspend to disk).
TPS51116 has all of the protection features including
thermal shutdown and is offered in both a 20-pin
HTSSOP PowerPAD™ package and 24-pin 4 ״QFN.
APPLICATIONS
• DDR/DDR2/DDR3/LPDDR3 Memory Power
Supplies
• SSTL-2 SSTL-18 and HSTL Termination
VTT
0.9 V
2A
VREF
0.9 V
10 mA
C3
Ceramic
2y10 µF
C4
Ceramic
0.033 µF
Ceramic
C1 ^{0.1 µF}
24 23 22 21 20 19
VTT VLDOIN VBST DRVH LL DRVL
1 VTTGND
PGND ¹⁸
2 VTTSNS
CS_GND 17
3 GND
4 MODE
TPS51116RGE
CS 16
V5IN 15
5 VTTREF
V5FILT 14
6 COMP
PGOOD 13
NC VDDQSNS VDDQSET S3 S5 NC
7
8
9
10 11 12
S3 S5
M1
IRF7821
L1
1 µH
M2
IRF7832
R1
5.1 kΩ
VDDQ
1.8 V
10 A
C6
SP−CAP
2y150 µF
VIN
C5
Ceramic
2y10 µF
R3
5.1 Ω
5V_IN
R2
100 kΩ
C7
Ceramic
1 µF
C2
Ceramic
1 µF
PGOOD
UDG−04153
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
D-CAP, PowerPAD are trademarks of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2009, Texas Instruments Incorporated