TPIC6B596DWRG4 Datasheet, PDF (1/17 Pages) Texas Instruments – POWER LOGIC 8-BIT SHIFT REGISTER

TPIC6B596
POWER LOGIC 8ĆBIT SHIFT REGISTER
SLIS095A − MARCH 2000 − REVISED MAY 2005
D Low r_DS(on) . . . 5 Ω
D Avalanche Energy . . . 30 mJ
D Eight Power DMOS-Transistor Outputs of
150-mA Continuous Current
D 500-mA Typical Current-Limiting Capability
D Output Clamp Voltage . . . 50 V
D Enhanced Cascading for Multiple Stages
D All Registers Cleared With Single Input
D Low Power Consumption
description
DW OR N PACKAGE
(TOP VIEW)
NC ₁
V_{CC 2}
SER IN ₃
DRAIN0 4
DRAIN1 5
DRAIN2 6
DRAIN3 7
SRCLR 8
G9
GND 10
20 ^NC
19 ^GND
18 ^{SER OUT}
17 DRAIN7
16 DRAIN6
15 DRAIN5
14 DRAIN4
13 SRCK
12 RCK
11 GND
The TPIC6B596 is a monolithic, high-voltage,
NC − No internal connection
medium-current power 8-bit shift register
designed for use in systems that require relatively
logic symbol^†
high load power. The device contains a built-in
voltage clamp on the outputs for inductive
transient protection. Power driver applications
G9
RCK ¹²
EN3
C2
include relays, solenoids, and other medium-
current or high-voltage loads.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. Data transfers through both the shift and
storage registers on the rising edge of the
shift-register clock (SRCK) and the register clock
(RCK), respectively. The storage register
transfers data to the output buffer when shift-
register clear (SRCLR) is high. When SRCLR is
low, all registers in the device are cleared. When
output enable (G) is held high, all data in the
output buffers is held low and all drain outputs are
off. When G is held low, data from the storage
8
SRCLR
13
SRCK
SRG8
R
C1
SER IN ³
1D
2
2
4
DRAIN0
5
DRAIN1
6
DRAIN2
7
DRAIN3
14
DRAIN4
15
DRAIN5
16
DRAIN6
17
DRAIN7
18
SER OUT
register is transparent to the output buffers. When
data in the output buffers is low, the DMOS-
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984}
and IEC Publication 617-12.
transistor outputs are off. When data is high, the
DMOS-transistor outputs have sink-current capability. The serial output (SER OUT) is clocked out of the device
on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved
performance for applications where clock signals may be skewed, devices are not located near one another,
or the system must tolerate electromagnetic interference.
Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sink-
current capability. Each output provides a 500-mA typical current limit at T_C = 25°C. The current limit decreases
as the junction temperature increases for additional device protection.
The TPIC6B596 is characterized for operation over the operating case temperature range of −40°C to 125°C.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2000 − 2005, Texas Instruments Incorporated
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