TMS570LS0432 Datasheet, PDF (1/101 Pages) Texas Instruments – TMS570LS0432/0332 16/32-Bit RISC Flash Microcontroller

TMS570LS0432
TMS570LS0332
www.ti.com
SPNS186 – OCTOBER 2012
TMS570LS0432/0332 16/32-Bit RISC Flash Microcontroller
Check for Samples: TMS570LS0432
1 TMS570LS0432/0332 16/32-Bit RISC Flash Microcontroller
1.1 Features
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• High-Performance Automotive Grade
Microcontroller for Safety Critical Applications
– Dual CPU’s Running in Lockstep
– ECC on Flash and RAM interfaces
– Built-In Self Test for CPU and On-chip RAMs
– Error Signaling Module with Error Pin
– Voltage and Clock Monitoring
• ARM® Cortex™ – R4 32-bit RISC CPU
– Efficient 1.66DMIPS/MHz with 8-stage
Pipeline
– 8-Region Memory Protection Unit
– Open Architecture with 3rd Party Support
• Operating Conditions
– 80MHz System Clock
– Core Supply Voltage (V_CC): 1.2V nominal
– I/O Supply Voltage (V_CCIO): 3.3V nominal
– ADC Supply Voltage (V_CCAD): 3.3V Nominal
• Integrated Memory
– Up to 384kB Program Flash with ECC
– 32kB RAM with ECC
– 16kB Flash for Emulated EEPROM with ECC
• Common Platform Architecture
– Consistent Memory Map Across Family
– Real-Time Interrupt Timer (RTI) OS Timer
– 96-channel Vectored Interrupt Module (VIM)
– 2-channel Cyclic Redundancy Checker (CRC)
• Frequency-Modulated Phase-Locked-Loop
(FMPLL) with Built-In Slip Detector
• IEEE 1149.1 JTAG, Boundary Scan and ARM
CoreSight Components
• Advanced JTAG Security Module (AJSM)
• Multiple Communication Interfaces
– Two CAN Controllers (DCAN)
• DCAN1 - 32 Mailboxes with Parity
Protection
• DCAN2 - 16 Mailboxes with Parity
Protection
• Compliant to CAN protocol Version 2.0B
– Multi-buffered Serial Peripheral Interface
(MibSPI)
• 128 Words with Parity Protection
– Two Standard Serial Peripheral Interfaces
(SPI)
– UART (SCI) interface with Local Network
Interface (LIN 2.1) support
• High-End Timer Module (N2HET)
– Up to 19 Programmable Pins
– 128 Word Instruction RAM with Parity
Protection
– Each Includes Hardware Angle Generator
– Dedicated Transfer Unit (HTU)
• Enhanced Quadrature Encoder Pulse (eQEP)
– Motor Position Encoder Interface
• 12-bit Multi-Buffered ADC Module
– 16channels
– 64 Result Buffers with Parity Protection
• Up to 45 general purpose I/O (GIO) capable
pins
– 8 Dedicated General-Purpose I/O (GIO) Pins
with up to 8 External Interrupts
• Packages
– 100-pin Quad Flatpack (PZ) [Green]
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