TMS470R1VF478 Datasheet, PDF (1/69 Pages) Texas Instruments – 16/32-BIT RISC FLASH MICROCONTROLLER

TMS470R1VF478
16/32-BIT RISC FLASH MICROCONTROLLER
SPNS082D – JANUARY 2004 – REVISED JANUARY 2006
O High-Performance Static CMOS Technology
O TMS470R1x 16/32-Bit RISC Core (ARM7TDMI™)
– 24-MHz System Clock (60-MHz Pipeline)
– Independent 16/32-Bit Instruction Set
– Open Architecture With Third-Party Support
– Built-In Debug Module
– Utilizes Big-Endian Format
O Integrated Memory
– 288K-Byte Program Flash
– One 32K-Byte Bank With Four 8K-Byte
Sectors
– One 256K-Byte Bank With Four 64K-Byte
Sectors
– Internal State Machine for Program and
Erase
– 16K-Byte Static RAM (SRAM)
O Operating Features
– Core Supply Voltage (V_CC): 1.81 V - 2.05 V
– I/O Supply Voltage (V_CCIO): 3.0 V - 3.6 V
– Low-Power Modes: STANDBY and HALT
– Industrial and Automotive Temperature
Ranges
O 470+ System Module
– 32-Bit Address Space Decoding
– Bus Supervision for Memory and
Peripherals
– Analog Watchdog (AWD) Timer
– Digital Watchdog (DWD) Timer
– Real-Time Interrupt (RTI)
– System Integrity and Failure Detection
O Direct Memory Access (DMA) Controller
– 32 Control Packets and 16 Channels
O Frequency-Modulated Phase-Locked Loop
(FMPLL)-Based Clock Module With Prescaler
– Multiply-by-4 or -8 Internal FMPLL Option
O Six Communication Interfaces:
– Two Serial Peripheral Interfaces (SPIs)
– 255 Programmable Baud Rates
– Serial Communication Interface (SCI)
– 2²⁴ Selectable Baud Rates
– Asynchronous/Isosynchronous Modes
– High-End CAN Controller:
– 32-Mailbox Capacity
– Fully Compliant With CAN Protocol,
Version 2.0B
– Standard Can Controller (SCC)
– 16-Mailbox Capacity
– Fully Compliant With CAN Protocol,
Version 2.0B
– Multi-Buffered Serial Peripheral Interface
(MibSPI)
– 128-Word Buffer
– Four DMA Channels
– Six Chip Selects
O High-End Timer (HET)
– 32 Programmable I/O Channels:
– 30 High-Resolution Pins
– 2 Standard-Resolution Pins
– High-Resolution Share Feature (XOR)
– High-End Timer RAM
– 128-Instruction Capacity
O Two 10-Bit, 16-Channel Multi-Buffered ADCs
– 128-Word FIFO Buffer
– Single- or Continuous-Conversion Modes
– 1.55 μs Minimum Sample and Conversion
Time
– Calibration Mode and Self-Test Features
O Four External Interrupts
O Flexible Interrupt Handling
O 3 Dedicated General-Purpose I/O (GIO) Pins,
1 Input-Only GIO Pin, and 62 Additional
Peripheral I/Os
O Compatible ROM Device (Planned)
O On-Chip Scan-Base Emulation Logic,
IEEE Standard 1149.1^† (JTAG) Test-Access Port
O 176-Pin Plastic Ball Grid Array (GJZ Suffix)
O Development System Support Tools Available
– Code Composer Studio™ Integrated
Development Environment (IDE)
– HET Assembler and Simulator
– Real-Time In-Circuit Emulation
– Flash Programming
O External Clock Prescale (ECP) Module
– Programmable Low-Frequency External
Clock (CLK)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Code Composer Studio is a trademark of Texas Instruments.
ARM7TDMI is a trademark of Advanced RISC Machines Limited (ARM).
All trademarks are the property of their respective owners.
† The test-access port is compatible with the IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary Scan Architecture
specification. Boundary scan is not supported on this device.
PRODUCTION DATA information is current as of publication
date. Products conform to specifications per the Texas
Instruments standard warranty. Production processing does
not necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
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