TMS416100 Datasheet, PDF (1/25 Pages) Texas Instruments – 16777216-BIT DYNAMIC RANDOM-ACCESS MEMORIES

This data sheet is applicable to all
TMS416100/Ps symbolized with Revision “B”
and subsequent revisions as described on
page 24.
• Organization . . . 16 777 216 × 1
• Single 5-V Power Supply (±10% Tolerance)
• Performance Ranges:
’416100- 60
’416100- 70
ACCESS ACCESS ACCESS READ
TIME TIME TIME OR WRITE
tRAC tCAC
tAA CYCLE
(MAX ) (MAX ) (MAX ) (MIN)
60 ns 15 ns 30 ns 110 ns
70 ns 18 ns 35 ns 130 ns
’416100- 80
80 ns 20 ns 40 ns 150 ns
• Enhanced Page Mode Operation for Faster
Memory Access
• CAS-Before-RAS Refresh
• Long Refresh Period
– 4096 Cycle Refresh in 64 ms
(TMS416100)
– 256 ms for Extended Refresh Version
(TMS416100P)
• 3-State Unlatched Output
• Low Power Dissipation (TMS416100P Only)
– 500-µA CMOS Standby Current
– 500-µA Self-Refresh Current
– 500-µA Extended Refresh Battery Backup
Current
• All Inputs, Outputs and Clocks Are TTL
Compatible
• Operating Free-Air Temperature Range:
0°C to 70°C
TMS416100, TMS416100P
16 777 216-BIT
DYNAMIC RANDOM-ACCESS MEMORIES
SMKS611 – FEBRUARY 1994
DJ PACKAGE
( TOP VIEW )
DGA PACKAGE
( TOP VIEW )
V_CC 1
D2
NC 3
W⁴
RAS ⁵
A11 ⁶
26 V_SS
25 Q
24 NC
23 _CAS
22 _NC
21 _A9
V_CC 1
D2
NC 3
W⁴
RAS ⁵
A11 ⁶
26 V_SS
25 Q
24 NC
23 _CAS
22 _NC
21 _A9
A10 8 19 A8
A0 9 18 A7
A1 10 17 A6
A2 11 16 A5
A3 12 15 A4
V_CC 13 14 V_SS
A10 8 19 A8
A0 9 18 A7
A1 10 17 A6
A2 11 16 A5
A3 12 15 A4
V_CC 13 14 V_SS
PIN NOMENCLATURE
A0 – A11
CAS
D
Q
NC
RAS
VCC
VSS
W
Address Inputs
Column-Address Strobe
Data In
Data Out
No Internal Connection
Row-Address Strobe
5-V Supply
Ground
Write Enable
description
The TMS416100/P series are high-speed, 16 777 216-bit dynamic random-access memories, organized as
16 777 216 words of one bit each. The TMS416100P series feature self refresh and extended refresh. They
employ state-of-the-art EPIC™ (Enhanced Performance Implanted CMOS) technology for high performance,
reliability, and low power at a low cost.
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All inputs, outputs, and clocks
are compatible with Series 74 TTL. All addresses and data-in lines are latched on chip to simplify system design.
Data out is unlatched to allow greater system flexibility.
The TMS416100/P are offered in 300-mil 24/26-lead plastic surface-mount SOJ packages (DJ suffix) and
24/26-lead plastic small-outline packages (DGA suffix). All packages are characterized for operation from 0°C
to 70°C.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1994, Texas Instruments Incorporated
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
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