TMS29F002B Datasheet, PDF (1/38 Pages) Texas Instruments – 262144 BY 8-BIT FLASH MEMORIES

" D Single Power Supply Supports 5-V 10%
Read/Write Operation
D Organization: . . . 262144 By 8 Bits
D Array-Blocking Architecture
– One 16K-Byte Protected-Boot Sector
– Two 8K-Byte Parameter-Sectors
– One 32K-Byte Sector
– Three 64K-Byte Sectors
– Any Combination of Sectors Can Be
Erased. Supports Full-Chip Erase
– Any Combination of Sectors Can Be
Marked as Read-Only
D Boot-Code Sector Architecture
– T = Top Sector
– B = Bottom Sector
D Sector Protection
– Hardware Protection Method That
Disables Any Combination of Sectors
From Write or Erase Operations Using
Standard Programming Equipment
D Embedded Program/Erase Algorithms
– Automatically Pre-Programs and Erases
Any Sector
– Automatically Programs and Verifies the
Program Data at Specified Address
D JEDEC Standards
– Compatible With JEDEC Byte Pinouts
– Compatible With JEDEC EEPROM
Command Set
D Fully Automated On-Chip Erase and
Program Operations
TMS29F002T, TMS29F002B
262144 BY 8-BIT
FLASH MEMORIES
SMJS848 – AUGUST 1997
D 100 000 Program/Erase Cycles
D Low Power Dissipation
D Low Current Consumption
– 40-mA Typical Active Read
– 60-mA Typical Program/Erase Current
– Less Than 100-µA Standby Current
D All Inputs/Outputs TTL-Compatible
D Erase Suspend/Resume
– Supports Reading Data From, or
Programming Data to, a Sector Not
Being Erased
D 40-Pin Thin Small Outline Package (TSOP)
(DCD Suffix)
D Detection Of Program/Erase Operation
– Data Polling and Toggle Bit Feature of
Program/Erase Cycle Completion
" D High-Speed Data Access at 5-V VCC 10%
– 70 Commercial . . . 0°C to 70°C
– 80 Extended . . . –40°C to 85°C
A0 – A17
DQ0 – DQ7
CE
OE
NC
VCC
VSS
WE
PIN NOMENCLATURE
Address Inputs
Data In / Data out
Chip Enable
Output Enable
No Internal Connection
Power Supply
Ground
Write Enable
description
The TMS29F002T/B is a 262 144 by 8-bit (2 097 152-bit), 5-V single-supply, programmable read-only memory
device that can be electrically erased and reprogrammed. This device is organized as 262 144 x 8 bits, divided
into seven sectors:
– One 16K-byte protected-boot sector
– Two 8K-byte sectors
– One 32K-byte sector
– Three 64K-byte sectors
Any combination of sectors can be marked as read-only or erased. Full chip erasure is also supported.
Sector data protection is afforded by methods that can disable any combination of sectors from write or read
operations using standard programming equipment. An on-chip state machine provides an on-board algorithm
that automatically pre-programs and erases any sector before it automatically programs and verifies program
data at any specified address. The command set is compatible with that of the Joint Electronic Device
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design phase of development. Characteristic data and other
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Copyright © 1997, Texas Instruments Incorporated
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