TMS28F004AEB Datasheet, PDF (1/80 Pages) Texas Instruments – 524288 BY 8-BIT/262144 BY 16-BIT AUTO-SELECT BOOT-BLOCK FLASH MEMORIES

TMS28F004Axy, TMS28F400Axy
524288 BY 8-BIT/262144 BY 16-BIT
AUTOĆSELECT BOOTĆBLOCK FLASH MEMORIES
SMJS829A − JANUARY 1996 − REVISED AUGUST 1997
D Organization . . . 524 288 By 8 Bits
262 144 By 16 Bits
D Array-Blocking Architecture
− One 16K-Byte Protected Boot Block
− Two 8K-Byte Parameter Blocks
− One 96K-Byte Main Block
− Three 128K-Byte Main Blocks
− Top or Bottom Boot Locations
D ’28F400Axy Offers a User-Defined 8-Bit
(Byte) or 16-Bit (Word) Organization
D ’28F004Axy Offers Only the 8-Bit
Organization
D Maximum Access / Minimum Cycle Time
− Commercial and Extended
5-V V_CC ± 10%
3.3-V V_CC ± 0.3 V
’28F400Axy60 60 ns 110 ns
’28F400Axy70 70 ns 130ns
’28F400Axy80 80 ns 150 ns
− Automotive (offered for only 5-V V_CC
voltage configurations)
5-V V_CC ± 10%
’28F400Axy70 70 ns
’28F400Axy80 80 ns
’28F400Axy90 90 ns
(x = S, E, F, M, or Z Depending on V_CC / V_PP
Configuration)
(y = T or B for Top or Bottom Boot-Block
Configuration)
D 100 000 and 10 000 Program / Erase Cycle
Versions
D Three Temperature Ranges
− Commercial . . . 0°C to 70°C
− Extended . . . − 40°C to 85°C
− Automotive . . . − 40°C to 125°C
D Industry Standard Packages Offered in
− 40-Pin TSOP (DCD Suffix)
− 44-Pin PSOP (DBJ Suffix)
− 48-Pin TSOP (DCD Suffix)
D Low Power Dissipation ( V_CC = 5.5 V )
− Active Write . . . 248 mW ( Byte Write)
− Active Read . . . 330 mW ( Byte Read)
− Active Write . . . 248 mW ( Word Write)
− Active Read . . . 330 mW ( Word Read)
− Block Erase . . . 165 mW
− Standby . . . 0.72 mW (CMOS-Input
Levels)
DBJ PACKAGE
( TOP VIEW )
V_PP 1
DU/WP 2
A17 3
A7 4
A6 5
A5 6
A4 7
A3 8
A2 9
A1 10
A0 11
E 12
V_SS 13
G 14
DQ0 15
DQ8 16
DQ1 17
DQ9 18
DQ2 19
DQ10 20
DQ3 21
DQ11 22
44 RP
43 W
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BYTE
32 V_SS
31 DQ15/A _−1
30 DQ7
29 DQ14
28 DQ6
27 DQ13
26 DQ5
25 DQ12
24 DQ4
23 V_CC
PIN NOMENCLATURE
A0 −A17 Address Inputs
BYTE
Byte Enable
DQ0 −DQ14 Data In / Out
DQ15/A _−1 Data In / Out (word-wide mode),
Low-Order Address (byte-wide mode)
E
Chip Enable
G
Output Enable
NC
No Internal Connection
RP
Reset / Deep Power-Down
VCC
VPP
VSS
W
Power Supply
Power Supply for Program / Erase
Ground
Write Enable
DU/WP
Do Not Use for ’AMy or ’AZy /Write Protect
D Fully Automated On-Chip Erase and
Word / Byte Program Operations
D Write Protection for Boot Block
D Industry Standard Command-State Machine
(CSM)
− Erase Suspend/Resume
− Algorithm-Selection Identifier
D Three Different Combinations of Supply
Voltages Offered
D All Inputs / Outputs TTL Compatible
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1997, Texas Instruments Incorporated
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
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